The screen shot above shows the latest Parallella board placement (after three major redesigns) and we are now within striking distance of meeting the aggressive project design and cost constraints with a set of specifications that we feel really good about. The expressions “Fast, Good or Cheap. Pick Two” has been our constant companion over the last three months. At this point we are clearly behind schedule, but we will work hard to make up ground over the next few weeks as we finish up the board routing and start building the first batch of boards. We really appreciate your patience until now and ask for a little more time to make sure we “get it right”.

Compared to our initial plans we have made some changes to the Parallella board specifications:

ZYNQ: We are pleased to announce that we will be using the Zynq-7020 device (instead of the Zynq-7010) on Parallella boards delivered to Kickstarter backers. For backers interested in using the programmable logic of the Zynq, this is a significant upgrade! Going forward, the basic Parallella board will include the Zynq-7010 but there will be higher performance (and higher price) boards available with the Zynq-7020 as well.

EXPANSION IO: After seeing some of the exciting potential uses cases for the Parallella board we understood that we needed to be much more aggressive in our IO design. After a lot of back and forth, we finally converged on a solution that includes four 60-pin Samtek connectors placed at the bottom side of the board (PEC_* above). In aggregate, these connectors bring out 48 FPGA logic pins, two complete link ports from the Epiphany chip, several power supply connections and have a max bandwidth of more than 8 GB/sec! These symmetrically placed low stack height connectors will enable development of a wide array of exciting daughter cards going forward.

After seeing some of the exciting potential uses cases for the Parallella board we understood that we needed to be much more aggressive in our IO design. After a lot of back and forth, we finally converged on a solution that includes four 60-pin Samtek connectors placed at the bottom side of the board (PEC_* above). In aggregate, these connectors bring out 48 FPGA logic pins, two complete link ports from the Epiphany chip, several power supply connections and have a max bandwidth of more than 8 GB/sec! These symmetrically placed low stack height connectors will enable development of a wide array of exciting daughter cards going forward. CONNECTORS: We placed the standard connectors on opposite sides of the cards to allow easy access when sitting in a rack or closed box. To fit all the connectors on two edges, we had to minimize the size of the standard connectors.

We placed the standard connectors on opposite sides of the cards to allow easy access when sitting in a rack or closed box. To fit all the connectors on two edges, we had to minimize the size of the standard connectors. FORM-FACTOR: We have stayed within the credit card sized form factor, but due to placement constraints we have not been able to keep the corners rounded. This means that you won’t be able to place the Parallella board within an Altoid tin can.

We have stayed within the credit card sized form factor, but due to placement constraints we have not been able to keep the corners rounded. This means that you won’t be able to place the Parallella board within an Altoid tin can. MOUNTING HOLES: Four mounting holes have been added to allow easy mounting and system integration.



Some of these changes actually make it harder to meet the challenging Parallella cost constraints, but that’s our problem not yours. Don’t worry, we will figure out a solution. We added these capabilities to the board because our #1 goal is for the the Parallella platform to be used by as many people as possible and to stay around for a long time.

The detailed board specifications will be published Monday. We really look forward to getting feedback on the board (positive or negative) and will carefully consider all requests before finalizing the Parallella specifications. To make the process transparent and visible to all, we ask that you log all requests at the Parallella forum.