Micron is developing a DDR4-compatible hybrid DRAM-NAND stick to blast data at processors faster than the PCIe bus used by rival flash cache products.

DDR4 is a JEDEC standard and can move at least 2.1 billion blocks per second - the block size is set by the memory chip's word length in bits - and it beats the pants off DDR3. Micron thinks its hybrid could ship in 18 months, according to an EE Times report.

The silicon baker's RAM-flash mutant will be delivered as a hybrid dynamic inline memory module (the familiar DIMM) and the picture below shows such a DDR4 module from Samsung.

A Samsung DDR4 DIMM (Memo from Apple: You're not holding it right)

Micron's hybrid DIMM combines high-speed DRAM and nonvolatile NAND storage with controller chips. The schematic below shows the concept:

Micron DDR4 bus HDIMM overview

On the schematic the hybrid DIMM (HDIMM) controller interfaces with the DDR4 bus in the server and deals with the latency differences between DRAM and NAND accesses. The nonvolatile memory (NVM) controller will be updated if or when the manufacturer moves from NAND flash to, say, phase-change memory. Because the board hosts both DRAM and NVM it offers DRAM speed and non-volatility of data in the NVM.

But why would you want to do this? DRAM access times are in the order of nanoseconds whereas NAND takes microseconds to access - but in terms of storage space, NAND is plentiful and DRAM not as much, so the RAM will end up caching the slower but larger flash. Here are some applications:

Holding big databases in memory

Solid-state-drive replacements with a DRAM cache in front of the NAND

DRAM modules with a flash swap space

Flash block storage with DRAM assist

Micron's HDIMM could contain more than 256GB of memory and the company hopes that Microsoft's Windows operating system will support it. Microsoft has shown an interest but has made no commitment. Will this tech fly? Take-off may be more likely if other DRAM and flash fab owners show an interest to encourage wider operating system support. ®