Note that even though it's not specified, the reset must be asynchronous, otherwise the circuit won't work. We could end it here, but I'm pretty sure that H&H were trying to tease out more insight from the reader.

Consider what happens at power-up when the state of the flip-flops are unknown (remember those pesky red 'unknown state' during behavioural simulation?) H&H say that this circuit is glitch-free. It is. But, we could get an unwanted pulse if the first flip-flop starts out in a high state and the second in low state (see right side of diagram above). This may or may not affect the functionality of your circuit; that depends on what it's 'driving'. This could keep you debugging your apparently random-failing circuit for days in the lab. What other potential issues did I miss?

Now, why was I "offended"? As an experienced FPGA designer, seeing a non-clock signal going to a clock input feels like a punch to the stomach (as it should!). It's a major no-no unless you really know what you're doing. This is because clocking resources are 'special' and are carefully crafted to deliver synchronous clock-edges to the entire 'clock tree' at the same time. They're not meant to be used for 'ordinary' signals -- 'local routing' exist for those -- even though it's possible to arm-twist the tools to do it. Implementing H&H's circuit as-is would generate a warning, or physical-synthesis would deal with it by 'understanding' what you 'mean' and re-jig the circuit to do the right thing, or re-route the input as a clock signal wasting a valuable resource. These outcomes are bad, bad, bad since the designer seems to get away with it and think that this practice is 'ok'. Besides, different tools would interpret the 'meaning' differently so you would be really pushing your luck with non-portable code, even between versions of the same tool. The tools should, ideally, produce an error and halt unless the designer presents a notarised note from a Registered Guru, such as Dave Vandenbout.

Here's the circuit I've been using for forever