Media Coverage

What is it?

The OrangeCrab is an electronics development board. It is FPGA based featuring an ECP5 from Lattice. The board follows the slim feather board specification from Adafruit. The FPGA is compatible with all open source toolchains and is perfect for experimenting with RISC-V cores. There aren't many FPGA boards available that make use of the ECP5, but here are some distinct features that set this board apart:

Small Compact size (Take it anywhere!)

Direct USB connection to the FPGA (Operate as a DFU, MSC, CDC, or composite device!)

On-board DDR3 Memory (1Gbit!)

Pre-loaded DFU bootloader (No external programmer required!)

It's Orange!





What is a FPGA anyway?

FPGA is an acronym for Field Programmable Gate Array. At a basic level, a FPGA is an integrated circuit filled with an array of very basic digital building blocks.

One of these blocks is the Look-Up Table (LUT). A LUT takes some inputs and 'looks up' what its output should be. LUTs are programmable, so they can be configured to emulate basic logic elements: AND, OR, NOR, XOR. Or they can be programmed as compound logic.

Another element inside FPGAs is Flip-Flops or registers. These enable the chip to have a memory or current state. They update and hold their output value based on the input value at the rising edge of a clock signal.

The last major component inside a FPGA is the routing. Routing enables us, the digital designer, to tell the FPGA how all these internal elements shall be connected.

Using these blocks, we can create simple designs such as counters, and state machines or more complex designs like an entire CPU.

FPGAs are typically used in systems requiring lots of parallel processing, such as Video/Imaging processing, Digital signal processing, Telecom/communication encoding. They also work great for prototyping and learning digital electronics. They enable you to design and run custom digital logic. The FPGA used on this board is the ECP5 from Lattice, is classed as a low power/midrange FPGA. It's powerful enough to create a RISC-V 32bit CPU inside running at ~75MHz with a DDR3 memory controller. A CPU in isolation is typically not very useful, which is where SoC's come in.

What is a SoC?

System On Chip (SoC), in an FPGA context, describes a CPU and its connection to memory, cache, peripherals, and I/O. An FPGA is a perfect tool to experiment with your own SoCs.

Have you ever been working through a project, but then need just one more UART?

Run out of Timers?

Short on PWM?

No more program space?

Routed UART TX/RX backward on a circuit board?

A custom SoC design may have been able to help! Because you're in control of everything, you get to decide how many UARTs or PWMs you have!

If you want 20 UARTs, one on every I/O pin, this FPGA can deliver.

I've been enjoying using LiteX for working on custom SoC. It handles a lot of the basic tasks required, such as:

Headers: defining registers and function stubs for your custom memory-mapped peripherals

Firmware: compiling and embedding inside FPGA memory

Documentation: memory maps and bit-field descriptions of registers.

Litex also works seamlessly with LiteDRAM, which is an open source DDR memory controller. This is used and tested on the OrangeCrab to handle the management of the on-board DDR3 memory.

Hardware Overview

Lattice ECP5-25F FPGA in csfBGA285 package (-8 speed grade) (Part # LFE5U-25F-8MG285C) 24 K - Look Up Tables 1008 Kb - Embedded Block RAM 194 Kb - Distributed RAM 28 - 18x18 Multipliers PLLs: 2 Internal oscillator Flexible I/O for DDR3 Memory Support

DDR3L Memory 128 Mbytes (1Gbit) 64M x16 1.35V low voltage operation

Micro USB connection Full-speed (12Mbit) USB with a direct connection to the FPGA

Non-volatile Storage 128Mbit QSPI FLASH Memory Bootloader (First 4Mbits) User Bitstream User storage (Firmware/MSC backend/etc) QSPI compatible MicroSD socket 4bit SD interface (CK, CMD, DAT0-3)

Power supply High efficiency DCDC for main supplies Battery charger (100mA), with a charge indicator LED LiPo battery connector (PH type)

48MHz onboard oscillator

Standard 0.05" JTAG connector

User I/O 1x Button 1x RGB LED 20x I/O on 0.1" headers

Analog System Analog Mux SAR ADC, external RC / input comparator of FPGA Digital bypass Internal channels for supply monitor Battery voltage sensing

Feather Format Board Dimensions: 22.86mm x 50.8mm (0.9" x 2.0").



Compact Size

Unlike traditional FPGA development boards, this board is small enough to carry in your pocket and function as a prototyping ground for custom SoC designs. Create custom SoCs or work on your own custom digital logic designs on a bus, train, or in an airplane.

If you are not familiar with the feather format, you might be surprised by the size of this board. The Feather format has dimensions of: 22.86 x 50.8mm (0.9" x 2.0")

For reference this is the board pictured next to some standard ISO/IEC 7810 ID-1 cards.

Board Photos

This what you will receive, the OrangeCrab r0.2

MicroSD card not included, just shown for demonstration purposes





Example Projects

OrangeCrab-examples - still a work in progress

DFU Bootloader - The DFU bootloader that ships with the OrangeCrab.

Linux on OrangeCrab - An example of running Linux-On-Litex on OrangeCrab





Programming

The board comes pre-loaded with a USB based DFU bootloader. Just hold down the button while plugging it in to activate. The bootloader lets you load new bitstreams (FPGA code) or firmware (RISCV code) directly into the FLASH, without the need for an external programmer.

The bootloader is also open source, based on foboot (fomu bootloader)

For more advanced users, the board also features a standard 0.05" JTAG connector. The ECP5 can be reprogrammed directly over JTAG or using a SPI bypass mode, and the onboard FLASH can be read/written over JTAG.





Use your OrangeCrab in different ways

MicroPython + CircuitPython

This is still a work in progress!

Plug the board in and start blinking LEDs straight away with no external tools required.

RISCV firmware

Install the RISCV GCC compiler and start programming the board, code is executed on the SoC created by the bootloader.

FPGA gatware

Update the FPGA gateware using Verilog or other Higher level language: nMigen, Litex, Chisel, etc.





Fully Open Source

The OrangeCrab has been created in KiCad, an open source EDA suite.

OrangeCrab is a certified open source project: AU000006

All design files are available on the OrangeCrab Github repository

An open source bootloader Which uses an an open source VexRiscv CPU Which in turn implements the open source ISA: RISCV (rv32im)

Fully compatible with the open source FPGA toolchain and flow: Yosys - Synthesis Nextpnr - Place and route Trellis - ECP5 documentation and utilities.



The open source toolchain is quick to install and fully cross platform. These tools can be installed by following the installation guides on each project, or alternatively there are prebuilt versions

The Board is also fully compatible with Lattice's Diamond IDE.





Find more info on the projects Github pages site: https://gregdavill.github.io/OrangeCrab/r0.2/