If SeaMicro has been "awash in business" as company founder, Andrew Feldman, tells El Reg it has been in the wake of last June's launch of the 512-core, 10U Atom-based SM10000 server, then the company had better batten down the hatches and prepare for the deluge. Because today SeaMicro is shipping the second generation of its ultra-dense integrated server/switch/load balancing platform based on a 64-bit version of Intel's Atom processors.

As El Reg reported last summer when SeaMicro came out of stealth mode, the company had put together a very clever and compact server based on 32-bit, single-core Atom Z530 processors. The SM10000 put eight of these Atom Z530 processors and their chipsets on a single card, with SeaMicro's homegrown ASICs for creating a proprietary chassis backplane linking the server nodes to in-chassis Gigabit and 10 Gigabit Ethernet switches in the back of the chassis, disk drives and controllers in the front of the chassis, and a load balancer for managing traffic across the networks and fabric lashing it all together.

Cramming 512 cores of any kind into a 10U space along with storage and networking to support those nodes is not an easy task, no matter what chip architecture you are using. But Gary Lauterbach, a chip designer who used to work for Advanced Micro Devices who also designed the former Sun Microsystems UltraSparc-III and UltraSparc-IV processors, put together a team of engineers from AMD, Cisco Systems, Force10 Networks, Juniper Networks, and Sun Microsystems to get it done. Feldman, who used to run marketing at Force10, is SeaMicro's chief executive officer and is an evangelist for compact systems that can do hyperscale work, but do so more efficiently than standard x64-based machines.

SeaMicro was founded in July 2007, and the original SM10000 server board and its system took more than three years to develop, plus $25m in venture funding from Khosla Ventures, Draper Fisher Jurvetson, Crosslink Capital, and an unnamed private backer. SeaMicro also cadged a $9.3m slice of a $47m grant in January 2010 from the US Department of Energy to come up with some greener technologies for the data center.

The first SeaMicro system board had eight of the single-core Atom Z530 Atom and their "Poulsbo" US15W chipsets soldered onto it, thus:

The first-generation SeaMicro Atom Z530 server board (click to enlarge)

What SeaMicro developed - and what makes the SM10000 server unique - is an ASIC chip that virtualizes disk access and Ethernet networking for each of the Atom servers. The ASIC also implements a 3D torus interconnect between all of the 64 server boards nodes in the chassis, which delivers 1.28 Tb/sec of aggregate bandwidth across the cores and boards in the box. The SM10000 also has a little something called Dynamic Compute Allocation Technology, or DCAT, which is a home-grown field programmable gate array (FPGA) that does load balancing across the cores and boards.

The load balancing electronics are hooked into the SM10000's system management tools to allow for pools of servers to be grouped together and managed as a single object and to provide guaranteed performance levels for groups of processors, disk, memory, and fabric. Feldman told El Reg that last June that virtualized x64 servers cannot do this because they often oversubscribe resources to drive up utilization. Each core in the original blade runs at 1.6 GHz and has two threads and a SODIMM memory slot. Because the Z530 is a 32-bit processor, the system main memory was limited to 2 GB of operating system addressable memory for each server node on the board. The server card for the SM10000 is 5 by 11 inches.

Intel has not announced its latest dual-core, four-thread Atom N570 processor for netbook and notebook computers yet, but SeaMicro, a server maker, is getting its hands on the chip first. (The N570 was expected to be launched in February but apparently has been pushed out a few weeks.)

The dual-core chip runs at 1.66 GHz and, more importantly, has 64-bit memory addressing and support for the VT-x electronics that Intel created for its chips to help support virtualization hypervisors such as Xen, KVM, and Hyper-V. While the N570 could, in theory, support terabytes of main memory, the initial memory controller on the chip only supports 4 GB of addressable system memory. That's twice the memory per chip as the Z530 and the two cores work, in essence, like a baby SMP server with about 1.8 or 1.9 times the oomph.