An engineering sample of AMD's long awaited 8 core server SOC code named "Hierofalcon" has been spotted and tested. This new power efficiency focused enterprise SOC has 8 ARM-64bit A57 cores running at 2.0Ghz. And although Hierofalcon maxes out at frugal TDP of 30W, the SOC packs a meaty punch. Besting significantly more power hungry chips with considerably higher clock speeds.



We talked about the "Hierofalcon" SOC last year, in an exclusive piece that detailed AMD's entire embedded roadmap. It was one of the more interesting products in AMD’s Embedded high-performance lineup. Hierofalcon is AMD's first 64-bit ARM based design and as previously stated is powered by upto eight ARM Cortex-A57 cores clocked at 2.0 GHz. Each A57 ARM core in the SOC features 512KB of L2 cache for a total of 4 MB for the eight cores. Hierofalcon is designed for and manufactured on Globalfoundries 28nm process technology.

The chip features full cache coherency, 8 MB of L3 cache and SMMU (I/O address, mapping and protection). The chip has a dual channel 64-bit DDR3/DDR4 memory controller with support for ECC memory protocols and speeds of up to 1866 MHz. The SOC also features a dedicated "Crypto Co-processor" and a Cortex A5 security processor.



The SOC will be compatible with AMD's SP1 BGA package and ship in a variety of SKUs with TDPs ranging from 15W to 30W. The SoC also features 10 Gb KR Ethernet and PCI-Express Gen 3 for high-speed network connectivity, making it ideal for control plane applications. The enhanced security features of the SOC - ARM TrustZone technology - aligns it with the growing need for enhanced security features in the enterprise environment.

AMD began sampling the SOC last year and expects to launch products based on this eight core design in the on-going 4th quarter of 2015.

AMD R-Series “Heirofalcon” SOC Engineering Sample Spotted

An engineering sample of this SOC has been spotted by Matthias Waldhauer AKA Dresdenboy on osadl. All credit goes to him for compiling the benchmarking data and visualizing it in the graphs you'll see below.

Let's start with the first chart which shows the performance on a single core at a normalized clock speed. Taking a quick look at the integer benchmark "kDhrystone" we can see that Hierofalcon AKA Seattle actually does incredibly well here besting all of AMD's desktop processors and inching closely towards Intel's Sandy Bridge based offerings.

Moving on to the floating point "Whetstone" benchmark we can see a reshuffle of the results, with AMD's Kaveri and Intel's Sandy Bridge in the lead. The following three benchmarks are Execl - not to be confused with Excel - kCopy and kPipe. All three measure the performance of operating system functions, initiating processes, copying data and loading the pipe. The final "Index" chart shows the combined result of the previously mentioned three OS benchmarks.

This next chart shows performance with all cores enabled at default clock speeds, Hierofalcon is normalized to 1.0 for illustrative purposes. At both integer and floating point the SOC leads many other chips with significantly higher clock speeds. In the OS tests however it's very much on par with the Steamroller based Kaveri A10 7850K.



In the final chart we take a closer look at performance/watt, a crucial metric for servers. In both integer and floating point applications Seattle / Hierofalcon outshines all the other chips by a minimum of 2X or 100%. It sports a performance/watt advantage of 4X compared to AMD's own 28nm based - same process as Hierofalcon - Kaveri APU. Moving on to the combined OS score, we find that the SOC manages to put on a very good showing here as well. Besting Kaveri by 3X and coming very close to Intel's Sandy Bridge based chips.

As always, a grain of salt is warranted, do keep in mind that these are merely early figures for an engineering sample and a reshuffling of the results is to be expected once the product launches. All in all however, this early result looks mighty impressive for Hierofalcon and does lend credibility to ARM in the enterprise.