The CMOS developer shows off a new process technology that could reduce power consumption in mobile chips by up to 80 percent without affecting performance.

SuVolta has developed a new process technology that can reduce the power consumption of the transistors used in microprocessors and other semiconductors by 50 percent without affecting performance, the company said. The developer of scalable low-power CMOS technologies presented its new transistor technology in a joint technical paper with Fujitsu at the International Electron Devices Meeting in Washington on Wednesday.

The process, called Deeply Depleted Channel (DDC) low-power transistor technology, can actually deliver an 80 percent or better reduction in power consumption without impacting operating speed when coupled with advanced voltage scaling techniques, the company said.

"SuVolta's technology, which we have proven in silicon, has generated a tremendous amount of interest in the semiconductor industry," said Bruce McWilliams, president and CEO of SuVolta, in a statement. "We are now disclosing the details of our DDC transistor technology so that the industry's technologists can envision how SuVolta's technology can lower power consumption, can allow lower supply voltage, and can enable process scaling to sub-20 nanometers."

The new method for fabricating transistors removes dopants, which are impurities introduced to silicon to make it a conductor, from the transistor channel to create an undoped or very lightly doped region that allows for improved scaling and a better flow of current (illustrated below). Combined with other SuVolta techniques for setting a transistor's threshold voltage levels and charge screening, the DDC channels effectively halve the amount of power the transistors need to perform while also resulting in lower power leakage and better yields for semiconductor manufacturers, the company said.

SuVolta called the new process ideal for low-power semiconductor products, which include chips used in small mobile devices, embedded systems, and storage and memory products. While the microprocessors used in power-hogging PCs and servers will continue to shrink in accordance with Moore's Law, in part to save power, such smaller semiconductor products may not keep pace with the Intel founder's famous observation that the amount of circuitry on computer chips tends to double every two years or so.

Scott Thompson, SuVolta's chief technology officer, went so far as to predict an end to Moore's Lawat least when it comes to a certain segment of low-power semiconductor products, if not for the most powerful x86-based CPUs made by the likes of Intel and Advanced Micro Devices.

"There are times when making chips smaller just doesn't make sense anymore," Thompson said. "Increased lithography costs are inciting the end of Moore's Law because the cost per transistor is plateauing. We are approaching that time now with 28nm and 20nm which I believe will be long-lived nodes.

"Aside from microprocessors, most of the chips for the mobile market put a premium on cost control and low power consumption. SuVolta's DDC structure is unique in that it is the only transistor approach that is fully compatible with today's CMOS process integration and fab facilities, and that enables semiconductor companies to retain their existing circuit intellectual property."