Transistor made from all two-dimensional materials

(Nanowerk Spotlight) Much hope (and hype) rides on graphene as a 'post-silicon' material for fabricating next-generation nanoelectronic devices. However, graphene's Achilles heel is its lack of an energy band gap – a specific property of semiconductor materials that separates electrons from holes and allows a transistor implemented with a given material to be completely switched off. The results are leaky transistors not suitable for digital electronics.

Therefore, graphene must be modified to produce a band gap, if it is to be used in electronic devices. That way, various methods of making graphene-based field effect transistors (FETs) have been exploited, including doping graphene, tailoring graphene-like a nanoribbon, and using boron nitride as a support.

Using a new approach, researchers from the University of California, Berkeley and Lawrence Berkeley National Laboratory now have demonstrated the operation of an all two-dimensional (2D) transistor, using a transition metal dichalcogenides (TMDC) channel material, hexagonal boron nitride (h-BN) gate dielectric, and graphene source/drain and gate contacts.

This is one of the first demonstrations of an all-2D transistor.

Featuring the same flat hexagonal, honeycombed structure as graphene and many of the same electrical advantages, these TMDC – unlike graphene – have direct energy band gaps. This facilitates their application in transistors and other electronic devices.

"Our devices show no degradation of mobilities at high electric fields," Tania Roy, a postdoc researcher in Prof. Ali Javey's research group at Berkeley, tells Nanowerk. "Transistors with conventional three-dimensional materials show degradation of mobility at high electric fields due to surface roughness scattering. Our observations demonstrate that all-2D transistors do not suffer from this problem."

She points out that the interfaces are clean and devoid of trap states which kill the mobility. "Thus, all-2D transistors can offer a solution to the problems faced by transistors built with conventional materials systems."

Reporting their findings in the April 29, 2014 online edition of ACS Nano ("Field-Effect Transistors Built from All Two-Dimensional Material Components"), first-authored by Roy, the researchers presents a unique platform for utilizing heterostructures of user-defined layered materials with atomically uniform and digitally controlled thicknesses for functional devices.

Schematics (not to scale) of the fabrication process steps (top) and the corresponding optical microscope images (bottom) of a representative all-2D FET. (i) Transfer of large-area CVD grown bilayer graphene onto a Si/SiO 2 substrate. (ii) Bilayer graphene patterning by O 2 plasma to define S/D contacts. (iii) Transfer of a few-layer MoS 2 flake on top of the patterned graphene S/D contacts. (iv) Transfer of a few-layer h-BN gate dielectric, overlapping the MoS 2 channel. (v) Transfer of a multilayer graphene top gate electrode. (vi) Optical microscope image of a fully fabricated all-2D transistor. Scale bar is 5 µm for all images. (Reprinted with permission from American Chemical Society) (click image to enlarge)

An important result from this work is the fact that the mobility of these all-2D transistors do not degrade at high electric fields, showing little surface roughness scattering in these devices, which would translate to faster and more power-efficient devices.

The research team also shows that they can digitally control the thickness of their transistors and the materials that compose the transistors. For example, they can very accurately control the number of layers of 2D material – in this case, transition metal dichalcogenide MoS 2 – that will make up the channel.

Similarly the thickness of the gate and all the electrodes can also be controlled as well.

The problems of interface and surface with conventional materials can be solved using only 2D materials. Roy notes that, since a dry transfer technology was used to make the transistors, there is no lattice mismatch of the channel with the substrate or with the gate dielectric. Also, the channel can be made as thin as a few layers of molecules, without encountering mobility degradation.

For this work, the team used the scotch-tape exfoliation method for building their transistors. "Future work should be towards obtaining large area TMDC materials for the channel and hexagonal boron nitride for the gate," says Roy. "We would like to obtain single crystalline materials, for improved device properties. This is still a major challenge."

She adds that her team used a homemade dry-transfer method for making their transistors, which is ingenious but strenuous. An automated method would be more useful.