Intel has announced that its third-generation Xeon Phi, codenamed Knights Hill, will deploy on 10nm technology and feature the second iteration of Intel’s Omni-Path fabric. Knights Hill is quite a ways out — Intel’s Knights Landing, which is based on 14nm technology, won’t launch until the summer of 2015, which means Knights Hill is likely a 2017 (or later) part.

Currently, Intel’s highest-end MIC (Many Integrated Core) is Knights Corner, a 22nm design with 50 or more cores and a design that derives from Intel’s classic Pentium (P54C), albeit with 512-bit AVX units and an entirely different memory architecture. Knights Landing will be built on 14nm and deploy the same Silvermont architecture that powers Intel’s Bay Trail. In a major departure, however, that future iteration of the core will support four threads per CPU — currently Silvermont doesn’t use Hyper-Threading at all.

Data on Knights Hill is currently extremely limited, but Intel is making the announcement now to reassure customers that there’s a roadmap stretching out beyond the Knights Landing product and the 14nm node. The first generation of Intel’s Omni-Path scaling architecture will debut next year. So far, Intel has focused on expanding the per-core capabilities of the Xeon Phi family rather than simply piling on more CPUs. Somewhere between 50-72 cores seems likely, though this could always creep up to 128 cores or more for the 10nm variant.

Future versions of the core will likely expand both the onboard memory pool (16GB is expected for Knights Landing; Knights Hill could pack 32GB or more), add additional bandwidth, and likely increase the interconnect performance between the CPU and the associated MIC. Intel might push its AVX standard up as high as 1024-bit registers, but this is unclear and likely depends on trends in the HPC community. Adding wider registers might seem like a simple way to boost performance, but it’s subject to the same diminishing returns as everything else. The current AVX specification allows for extensions of up to 1024 bits in length, however, so Intel has left this option open in the long term.

If Intel is introducing quad-threading into the Silvermont core for Knights Landing, it suggests that the company will keep this iteration of the CPU (and its multi-threading capabilities) for more than one generation. Whether it continues to build that capability out or whether the multi-threading is related to HT or uses a different type of resource allocation is still unknown. Companies like Sun and IBM have historically struck balances between the amount of threading in a core and its total single-thread throughput, and we expect Intel to do the same, even if Xeon Phi is explicitly designed for multi-threaded workloads.

Omni-Path is Intel’s next-generation networking interconnect that offers up to 100Gbps of bandwidth and will rely on Intel’s silicon photonics technology for signaling. The new standard offers up to 48 ports per switch compared to 36 ports on other top-end standards, and is designed to lower the cost of huge build-outs by reducing the total number of switches. The longterm goal is to reduce latency and allow for more effective scaling as the industry pushes forwards towards the elusive exascale goal.

For now, however, it still seems that Nvidia has pulled ahead in the overall performance game. If K80 ships out before Knights Landing, it’ll give Nvidia a further lead. All of this is complicated by the fact that HPC users may or may not be interested in rewriting software to take advantage of new APIs — Intel and Nvidia have traded rhetorical shots on that topic before, and we don’t expect to see that change anytime soon.

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