Intel’s working on a generation of CPU architecture that promises to be “significantly bigger… and closer to the linear curve on performance” than its current Sunny Cove design. That would presumably mean a processor that builds on an increase in transistor count while offering a generational performance boost greater than we’re currently seeing.

At the moment Intel’s new CPU design, Sunny Cove, has been created to deliver what is currently seen as a serious bump in instructions per clock (IPC). But CPU guru, Jim Keller, has said it’s working on a subsequent architecture generation that will be able to better take advantage of the touted 50x increase in transistors his team is aiming to deliver over the next few years.

The 15 – 18% IPC boost that Sunny Cove has delivered to the Ice Lake cores, compared with Coffee Lake cores running at an equivalent speed, is seen as significant progress. That’s despite the fact we’re looking at around a 38% increase in the per-core transistor count from one generation to the next. Coffee Lake is estimated to house 217 million 14nm transistors per core and Keller has stated that Ice Lake contains 300 million 10nm transistors. If a subsequent processor generation could get closer to a linear IPC boost relative to the transistor hike that would be seriously impressive.

Talking at Berkley recently, taking his “Moore’s Law is not dead” tour on the road, Jim Keller spoke about the evolution of microarchitectures, from the Intel 8080 all the way up to the latest Sunny Cove design powering its Ice Lake processors. And, referencing the new architecture, he talks about its complex make up… and a little about its eventual successor.

“[Sunny Cove has an] 800 instruction window, sustains between 3 and 6 x86 instructions per clock,” says Keller, “massive data predictors, massive branch predictors… We’re working on a generation that’s significantly bigger than this and closer to the linear curve on performance. This is a really big mindset change.”

A big mindset change that isn’t necessarily shared by contemporaries and Keller’s erstwhile employer, AMD. When she was giving one of only two HotChips keynotes, AMD CEO, Dr. Lisa Su, spoke about the limits of processor scaling going forward.

“The pure computation portion of it is actually not that big,” says Dr. Su, “the pure power that is utilized on computation is about a third of the overall processor power. And you end up spending a lot of power on the IO, and the interfaces, and really getting things on and off chip. And so that is one of the reasons that we’re not getting as much benefit from scaling as we go forward.”

But it’s Intel’s promised innovations in all of those different fields which Keller says will deliver the sorts of gains he’s talking about.

“Lots of people think ‘well, we’re hitting some kind of limit.’ I really doubt it,” he says. “We have a roadmap to 50x more transistors and huge steps to make on every single piece of the stack.

“Remember, computers are built by large numbers of people, but actually many, many small teams. Better prediction, better instruction set, architecture, better optimisation, better CAD tools, better libraries. The number of different places that we’re doing innovation is really, really high.”

The next time Intel is promising to look at IPC again is with the Golden Cove core design, with the Willow Cove core sitting between it and the current Sunny Cove microarchitecture offering smaller gains.

But that’s likely a long way off, Intel still needs to figure out a way to get Sunny Cove into our desktop processors first, because we seem to be stuck on 14nm Skylake derivatives for the moment, even with the upcoming Comet Lake.