TESIC: Platform for secure transactions

TESIC is a complete secure platform for the design of integrated circuit implementing secured transactions such as smartcard for banking or ticketing, ePassport, or standalone circuit for DRM or NFC secure element. The TESIC secure platform leverages Tiempo's unique power/performance auto-scaling and tamper-resistant asynchronous technology delivering unprecedented benefits for demanding embedded security applications.

TESIC platform benefits

The TESIC platform inherits the benefits of clockless design which offers unmatched advantages for such applications. In particular, TESIC delivers:

Maximum speed under variable power supply such as contactless systems where power relies on the distance between the reader and the antenna.

High security against hardware attacks (evaluated by external labs)

Key Features

Secure asynchronous 16-bit microcontroller core With extended memory address space

Three secure asynchronous crypto-processor cores DES/3DES AES RSA/ECC

Other customizable blocks e.g., Timers, UARTs...

SDK (Software Development Kit) GCC, GDB, Crypto-library (in C)



TESIC SAMPLES

The TESIC platform is silicon proven on TSMC 130 nm process. Please contact Tiempo for more information.

TESIC FPGA Version

Tiempo offers an FPGA emulation of the TESIC platform for software prototyping. The FPGA mimics the clockless behavior of the TESIC platform, allowing to efficiently develop software taking full advantage of this behavior. The FPGA board is delivered with a complete tool chain (compiler, debugger) as well as some software libraries. Please contact Tiempo for more information.