My friend linked me an interesting read from a website that has a bunch of slides concerning the Zen 2 architecture. One of those slides was a core layout for the Zen 2 CPU core, which I've been interested to see for a while since we have already seen the diagram for the Zen 1 CPU core.





You can read that article here . (It's in Japanese though).





From the Slide Deck released.





Since Fritzchenz Fritiz has an awesome die-shot of the Zen 2 CCD Chiplet , I decided to annotate a higher resolution version of the above layout diagram.





Zen 2 CPU Core Diagram





I love how tiny the Integer execution part is (ALU). Even load/store is a lot bigger, and Branch prediction is the largest block in the central core (though FPU/SIMD is bigger still). It really shows you just how much circuitry is required to make CPU cores like Zen 2 as smart as they are, using Out of Order and Speculative Execution for example.





Anyway, here my annotation of Zen 1's core (The seperator blocks are to the best of my knowledge, following distinct block lines on the silicon. The source for the Zen 1 diagram is from WikiChip .), also from Fritzchen Fritz's die shot of the Zen1/+ Zeppelin die .





Zen 1 CPU Core Diagram



