With these majority gates, logic AND and OR operations can be emulated. They enable arithmetic circuits that promise to be much more compact and energy efficient than the conventional NAND-based circuits.

Although majority gates can be built using standard transistors, more efficient devices could be made by incorporating other concepts. The imec team is investigating and benchmarking three different implementations of majority gates: spin-wave majority gates, spin torque majority gates and plasmonic majority gates. They differ in the way the information is encoded and processed in the device, and in the way the information is converted from the classical circuits based on transistors to these novel devices. This brings along different challenges, but also gives each of the devices distinct advantages – in terms of speed, power and area consumption, or in the ease with which circuits can be built.

Below, Iuliana Radu and the imec exploratory device team review the status of the three different majority gates.

Spin-wave majority gates: compact and ultra-low power

Spin-wave majority gates belong to the family of spintronic devices, which exploit the collective magnetization state in a ferromagnet rather than the charge of individual electrons to perform logic operations. In a magnetic material, the magnetization can oscillate, creating nanoscale waves of magnetization that propagate, the so-called spin waves or magnons. Spin waves have wavelengths in the micrometer to nanometer range and frequencies in the gigahertz (GHz) to terahertz (THz) range. Majority gate operation relies on the interference of (at least) three of these spin waves. The information can be encoded in either the amplitude or the phase (0 or π) of the waves. Using the phase to encode information is the most natural way leading to majority gates, since the phase of the wave after interference is simply the majority of the phases of the individual waves before interference.

Spin-wave majority gates promise a significant area and power reduction per computing throughput. Let’s take the example of a one-bit adder, a circuit that performs the addition of two binary bits. In CMOS technology, building such a circuit requires about 25 transistors. An equivalent wave computing circuit only requires 4 waveguides and 5 transducers to perform the same operation – transducers being the components that bridge between CMOS and the spin-wave domain. When benchmarking the spin wave majority gates against CMOS circuits by using micromagnetic simulations, imec concluded that the spin-wave circuits take on average 400 times lower power and 3.5 times less area than their CMOS counterparts.

Experimental validation of majority gate operation was lacking until recently - when researchers at the Technical University of Kaiserslautern in Germany, in collaboration with the imec team, demonstrated a first prototype of a spin-wave majority gate [1]. This first prototype is bulky and required the use of a material that is difficult to process industrially: yttrium iron garnet. However, the device fulfils the basic description of such a majority gate. The logic information is encoded in the phase of the input spin waves while the phase of the output signal represents the majority of the three phase states of the spin waves in the three inputs.