New SoC Aims at Edge Inference

by Kevin Morris

FPGAs and embedded processors are the new chocolate and peanut butter. Although each of the two technologies is powerful and useful all on its own, combining them on one chip brings a whole new level of capability to the table. (And they taste great together, too.) When Microchip bought Microsemi – which previously bought Actel – they inherited a robust line of low-power, high-reliability FPGAs. And, while these have traditionally been high-value niche devices for specialized markets such as military and aerospace, Microchip aims to move into the mainstream with a new “SoC” version of their PolarFire FPGA family.

PolarFire is a mid-range FPGA family that brings 100K to 500K logic elements with 12.7 Gbps SerDes transceivers, which the company claims deliver significantly lower power consumption, better security, and higher reliability than mid-range devices from other vendors. The power consumption advantage, in particular, has won the original PolarFire numerous sockets where other mid-range FPGAs couldn’t fit the power budget.

Now, the company has announced a new “SoC” version of PolarFire that adds an abundance of processor power to the mix, in the form of a five-core RISC-V processing subsystem. As we saw at last week’s RISC-V Summit, there is tremendous industry momentum around the open-source RISC-V ISA right now, and the PolarFire SoC is the first SoC FPGA to integrate hardened RISC-V processors (other FPGAs offer RISC-V as a soft core that can be implemented in FPGA LUT fabric).

The choice of RISC-V is interesting in several ways. First, of course, it means you don’t end up with a per-part royalty going to Arm for the privilege of having their cores on chip. More interesting, though, since RISC-V is an ISA, and not a specific hardware implementation, it means that each vendor can add their own optimizations and customizations. In this case, Microchip has built in some smart options that allow the cores in PolarFire SoC to operate deterministically – bringing real-time processing options to the table. You can, for example, turn off CPU branch predictors, configure L1 instruction cache to tightly integrated memory, configure the L2 memory system to provide determinism, make sure all cores are coherent to the memory subsystem and share coherent memory for message passing.

This is possible because the PolarFire RISC-V implementation (developed in collaboration with SiFive) has a flexible 2 MB L2 memory subsystem that can be configured as a cache, a scratchpad, or a direct access memory. This means that you can implement deterministic real-time embedded applications concurrent with a rich operating system such as Linux. These types of customizations are not possible if you’re simply licensing a pre-designed implementation such as an Arm core.

With the overall RISC-V ecosystem growing rapidly, it makes sense that Microchip would take their FPGA SoC in that direction. But Microchip is also chumming the waters to make sure that the ecosystem grows fast enough for their particular needs. The company has worked to build its own network of partners for RISC-V – dubbed “Mi-V” with purveyors of development tools such as GCC, IAR Systems, and AdaCore; open-source RTOSs such as Amazon FreeRTOS and Zephyr; commercial RTOSs such as Mentor’s Nucleus, Wind River’s VXWorks, Express Logic (now part of Microsoft) ThreadX, and Micrium (now part of Silicon Labs) Micrium OS; and of course a Yocto embedded Linux distribution. There are also vendors offering hardware and software IP, design houses, system-on-module vendors, middleware and security vendors, and more. Start a design with this RISC-V SoC and you should have plenty of support for your OS/RTOS, IP, software, and tool needs.

The PolarFire RISC-V subsystem includes a whopping five processor cores – a monitor core and four applications cores arranged as a cache-coherent cluster that communicates with the FPGA fabric via an AMBA switch with memory protection and QoS. In addition to the processor cores, there are numerous system peripheral blocks – interrupt controllers, event counters, anti-tamper, memory controllers for DDR3/4 and LPDDR3/4, debug and trace monitor blocks, a rich set of dedicated IO blocks, and, of course, utilities, such as a system controller and boot flash.

The FPGA part of the new SoC FPGA is basically what the company already offered in the PolarFire family. This includes devices ranging from 23K to 461K logic elements, 68 to 1,420 18×18 multiplier MAC (DSP) blocks, 1.8 to 31.6 Mbits on-chip RAM, 4 to 10 12.5 Gpbs SerDes lanes, and 2 PCIe gen2 endpoints. In other words – a very capable FPGA to go with a very capable processor subsystem. We suspect it will keep pace with any other mid-range SoC FPGA on the market in terms of performance and functionality, but with a significantly smaller power budget.

While many think of the Microchip/Microsemi/Actel-heritage FPGAs as tuned for specialized applications, it’s worth pointing out that, in fact, the demands of modern IoT applications have made the key attributes of these devices – low power, high security, and high reliability – go mainstream. Just about every IoT endpoint design on the planet today has serious power constraints and is gravely concerned about security. The military-strength security features of PolarFire are good for a lot of peace of mind in today’s IoT landscape.

So, we’ve got a low-power, high-security, high-reliability SoC FPGA with a well-supported real-time-capable deterministic RISC-V processing subsystem on the chip. What can we do with it? A lot, it turns out. As IoT builds out, there is an increasing need for compute power at the edge and endpoint. With many applications now demanding AI acceleration, we have a further need for a combination of traditional processing and acceleration of key compute-intensive tasks such as inference. The PolarFire SoC brings a well-balanced and differentiated set of capabilities to this party.

Front and center, of course, are applications such as smart embedded vision – which require high-performance AI inferencing acceleration as well as a powerful base application processor and a strong need for the flexibility of FPGA logic in connecting to the myriad different sensors, cameras, displays, and other related peripherals used in the types of designs that require smart vision. Robotics, drones, automotive ADAS and AD, industrial automation, security – all fit into the sweet spot for PolarFire SoC. It seems like the recent acquisition by Microchip could bolster PolarFire SoC’s move into the mainstream, as the company already has a robust channel and product portfolio addressing the broader market. It will be interesting to see how PolarFire SoC fares against competitive SoC FPGA families such as Xilinx’s Zynq and Intel’s SoC FPGAs.