ASML

Consumers take it for granted that their mobile phones and laptops will get faster and more powerful with each generation. After all, the semi­conductor industry has always made it so, by doubling the number of transistors it can fit onto a microchip every couple of years. But current techniques are reaching their limit.

Now, the industry is racing to develop an economically viable way to etch even smaller features onto microchips. The solution could be a technique called extreme-ultraviolet (EUV) lithography, which uses very-short-wavelength light to create features that are four times finer than those on current microchips. But overcoming the chemistry, physics and engineering challenges involved is costing the industry billions of dollars.

On 9 July, Intel — the world’s largest manufacturer of microchips — announced that it would invest €3.3 billion (US$4.1 billion) in ASML in Veldhoven, the Netherlands, the leading supplier of lithography equipment to the semiconductor industry. One-quarter of that is earmarked for research and development (R&D) of EUV equipment. “The situation has changed from, ‘Can we make it work?’ to ‘We have to make it work’,” says Stefan Wurm, director of lithography at Sematech, a semiconductor R&D consortium in Albany, New York.

The integrated circuit pattern on a microchip is made by shining light through a mask onto a silicon wafer that is coated with light-sensitive material called a photoresist. Where light hits the photoresist, it cures a pattern onto the surface of the chip that is then etched in chemically. The smallest features on today’s chips are 22 nanometres across, and are imprinted using deep ultraviolet light, typically with a wavelength of around 193 nm. Even that is a struggle, requiring tricks such as immersing the lens in water and using two exposure steps. “It’s already been optimized to the extreme,” says Luc Van den hove, chief executive of Imec, a nanoelectronics research company in Leuven, Belgium, that works with the semiconductor industry to test EUV lithography equipment.

Down, down, down

The only way to pattern smaller features is to shorten the wavelength used. Lowering it to 13.5 nm should allow microchip factories to produce features of 5 nm or smaller. But such a dramatic shortening will require a rethink of the optics, photoresists, masks and light source behind lithography systems. Most parts of the process are ready for prime time, but the light source still presents problems.

ASML

Almost all materials — even air — absorb light with wavelengths as short as 13.5 nm, so the process needs to be take place in a vacuum. And because the light cannot be guided with conventional mirrors and lenses, optics maker Carl Zeiss, headquartered in Oberkochen, Germany, has had to come up with alternative designs. “The good news is, Zeiss knows how to make these mirrors,” says Jos Benschop, senior vice-president for technology at ASML. The bad news, he adds, is that even these specialized mirrors — made from 80 alternating layers of atomically smooth silicon and molybdenum — absorb a lot of EUV light, so the light must be very bright.

The dimmer the light, the longer it takes to cure the photoresist, and because lithography is the slowest step in microchip manufacture, the strength of the EUV source is the key to keeping costs down. The first generation of EUV sources offered only about 10 watts of light, enough to pattern just 10 silicon wafers an hour. Benschop says that commercial systems must reach 200 watts and pattern at least 100 wafers an hour. To reach these goals, ASML is working with two companies: Cymer in San Diego, California; and XTREME Technologies, in Aachen, Germany, a subsidiary of Tokyo-based Ushio. Cymer, for instance, is fine-tuning a system that uses a 20-kilowatt laser to blast droplets of tin into a 500,000-degree plasma that emits EUV light.

ASML has just a few years to reach its goal. Intel says that it can use the current technology for two more generations of microchips, but only by adding expensive patterning steps and buying more lithography machines. Benschop admits that EUV technology should have been ready “yesterday”.

While it rushes to get the first EUV lithography systems ready for production, ASML faces another challenge from Intel. Circuits are typically etched on to 300-mm-wide silicon wafers, but the chip giant wants to move to 450-mm-wide wafers for EUV lithography. The shift could double the number of circuits that can be patterned at once — but it would also require ASML to develop new manufacturing equipment, which Intel wants by 2016. “The R&D challenges ASML is facing are enormous,” says Van den hove.