5-nanometer transistors are so tiny that around 2,000 can fit in the width of a human hair (for further reference, a single silicon atom is about 1-nanometer across). The company will be using the same EUV (extreme ultraviolet) technology that it first mastered with its 7-nanometer chips. EUV, which uses 13.5-nanometer wavelength light, has been a much-anticipated but difficult-to-master process. It's necessary to take chips to the next level and keep up with Moore's Law, which dictates that the number of transistors on a die doubles every 24 months.

In response to customers' surging demand for advanced process technologies to differentiate their next-generation products, we continue our commitment to accelerating the volume production of EUV-based technologies.

The move to smaller and smaller transistor sizes has taken its toll. GlobalFoundries, formerly AMD's chip-manufacturing arm, recently announced that it would cease efforts to manufacture 7-nanometer EUV chips because it was just too expensive. Samsung recently reported that its first EUV line, designed to build 7-nanometer chips, would cost $6 billion.

Samsung won't be alone building 5-nanometer chips, as its main rival TSMC recently unveiled 5-nanometer prototype chips for customers. It promised an 80 percent increase in transistors compared to 25 percent for Samsung, saying its chips would boost performance 15 percent compared to 10 percent for its rival. Samsung builds chips for itself and Qualcomm, while TSMC manufactures Apple's A11 and A12 processors. Intel, TSMC and Samsung are the remaining EUV chipmakers and all use advanced lithographic equipment manufactured by Netherlands-based ASML.

Intel recent revealed that its own EUV-powered 7-nanometer process may be ahead of schedule, though it now looks like it will arrive after Samsung has fired up its 5-nanometer fab lines. Intel has only just started building 10-nanometer chips, but has yet to ship anything in volume. The way Samsung and TSMC are going, it now risks slipping even farther behind.