By Adam Taylor

With the MicroBlaze soft processor system up and running on the Nexys Video Artix-7 FPGA Trainer Board, we need some software to generate a video output signal. In this example, we are going to use the MicroBlaze processor to generate test patterns. To do this, we’ll will write data into the Nexys board’s DDR SDRAM so that the VDMA can read this data and output it over HDMI.

The first thing we will need to do in the software is define the video frames, which are going to be stored in memory and output by the VDMA. To do this, we will define three frames within memory. We will define each frame as a two-dimensional array:

u8 frameBuf[DISPLAY_NUM_FRAMES][DEMO_MAX_FRAME];

Where DISPLAY_NUM_FRAME is set to 3 and DEMO_MAX_FRAME is set to 1920 * 1080 * 3. This takes into account the maximum frame resolution and the final multiplication by 3 accommodates each pixel (8 bits each for red, green, and blue).

To access these frames, we use an array of pointers to the each of the three frame buffers. Defining things this way eases our interaction with the frames.

With the frames defined, the next step it is to initialize and configure the peripherals within the design. These are:

VDMA – Uses DMA to move data from the board’s DDR SDRAM to the output video chain.

Dynamic Clocking IP – Outputs the pixel clock frequency and multiples of this frequency for the HDMI output.

Video Timing Controller 0 – Defines the output display timing depending upon resolution.

Video Timing Controller 1 – Determines the video timing on the input received. In this demo, this controller graba input frames from a source.

To ensure the VDMA functions correctly, we need to define the stride. This is the separation between each line within the DDR memory. For this application, the stride is 3 * 1920, which is the maximum length of a line.

When it comes to the application, we will be able to set different display resolutions from 640x480 to 1920x1080.

No matter what resolution we select, we will be able to draw test patterns on the screen using software functions that write to the DDR SDRAM. When we change functions, we will need to reconfigure the VDMA, Video Timing Generator 0, and the dynamic clocking module.

Our next step is to generate video output. With this example, there are many functions within the main application that generate, capture, and display video. These are:

Bar Test Pattern – Generates several color bars across the screen Blended Test Pattern – Generates a blended color test pattern across the screen Streaming from the HDMI input to the output Grab an input frame and invert colors Grab an input frame and scale to the current display resolution

Within each of these functions we pass a pointer to the frame currently being output so that we can modify the pixel values in memory. This can be done simply as shown in the code snippet below, which sets the red, blue, and green pixels. Each pixel color value is unsinged 8 bits.

When we run the application, we can choose which of the functions we want to exercise using the menu output over the UART terminal:

Setting the program to output color bars and the blended test gave the outputs below on my display:

Now we know how we can write information to DDR memory and see it appear on our display. We could generate a Mandelbrot pattern using this approach pretty simply and I will put that on my list of things to cover in a future blog.

Code is available on Github as always.

If you want E book or hardback versions of previous MicroZed chronicle blogs, you can get them below.

First Year E Book here

First Year Hardback here.