Last week, AMD used its Financial Analyst Day to talk up heterogeneous computing, the technology that the company is betting on to be the next “big thing” in the microprocessor business. To that end, company execs explained how their newly hatched Heterogeneous System Architecture (HSA) will evolve over the next three years to drive their product roadmap forward.

HSA, which until recently was know as the Fusion architecture, is AMD’s platform design for integrating CPU and GPU cores onto the same chip. But HSA is more than AMD’s attempt to define an architecture for internal use, as was the case for Fusion. Rather HSA is an open specification that AMD wants the industry to adopt as the de facto platform for heterogenous computing.

As we reported earlier this week, AMD’s heterogeneous computing aspirations in the short-term will focus expanding its APU (Accelerated Processing Unit) wins in client computing devices, like notebooks and tablets. But the chipmaker has its sites set on eventually moving these chips into the server market, where application workloads like HPC and multimedia web serving can take advantage of the on-silicon CPU-GPU integration.

It’s worth noting that over the next three years, AMD intends to evolve the HSA feature set toward greater integration and more advanced capabilities — features that would dovetail nicely with server work. For example, by 2013, the chipmaker intends to support fully coherent memory and a unified address space for the CPU and GPU, and by 2014, HSA will enable capabilities like GPU context switching and QoS support. NVIDIA is likely to have a similar roadmap as it rolls out its upcoming “Project Denver” (ARM-GPU) offerings, but only AMD has offered up a public roadmap with this much detail.

This all assumes the industry is ready and willing to adopt heterogenous computing as the game-changer technology that AMD believes it to be. While system heterogeneity is already pretty well-accepted in the HPC community, the larger IT community, and especially the mobile computing space, is just beginning to realize the benefits. So part of the AMD’s efforts last week focused on making that case.

In a breakout session at the Financial Analyst Day, AMD Corporate Fellow Phil Rogers reminded the audience that Moore’s Law, which drove the single-core and multicore eras of computing, is now being constrained by power. The solution is to use the available transistor budget more intelligently, that is, design the chips to be much more efficient at running parallel workloads.

“Today far too much parallel processing gets executed on processors that were not specifically designed for that process,” said Rogers. “What that means is a waste of power, and wasting power today is unforgivable.”

That message, which is essentially what NVIDIA has been preaching for years, implies that CPUs, as good as they are for serial processing, have failed to deliver the goods on parallel processing, especially data parallel workloads. GPUs, on the other hand can offer parallelism by the boatload, and in a power-efficient package.

Integrating the two architectures together, where the GPU is an on-chip coprocessor, is the optimal solution, says Rogers. By doing so, the two processors are brought into the same memory subsystem, which not only makes data communication between the disparate cores more efficient, it also greatly simplifies the programming model for GPU computing by bringing it into the realm of Symmetric Multi-Processing (SMP).

At least that’s the idea behind HSA. The spec is currently making the rounds with both AMD partners and competitors, in an attempt to get feedback from interested parties, but just as importantly, to get vendor buy-in. The goal is to build an ecosystem big and broad enough to support AMD’s APU offerings.

Specifically, the idea is to entice developers and ISVs to write applications to the spec, with the promise that the software would automagically work on anyone’s hardware. To make that a reality, AMD had to devise an architectural specification that was generic enough to be applicable to different microprocessors: CPUs, GPUs, or mixtures of the two. For example, the specification includes a so-called “virtual ISA” that is intended to make the architecture instruction-set agnostic.

Of course, platform neutrality was also the driving force behind OpenCL, an open programming standard for parallel programming introduced in 2008 and has attracted a wide set of adherents. HSA and OpenCL are compatible, inasmuch as HSA is being cast as a “optimized platform architecture for OpenCL.” That means initially, at least, some HSA features will have to be implemented as OpenCL extensions. According to Rogers, some of these features, such as eliminating data copies and low-latency dispatching, will make OpenCL codes more efficient.

The larger issue is that OpenCL is a low-level language that mainstream programmers are generally loathe to use. The high-level feature set of HSA is more in line with Microsoft’s new C++ AMP (Accelerated Massive Parallelism), a C++ extension geared for parallel programming on GPUs. Rogers believes the extension provides a natural programming platform for HSA and a way to leverage the vast C++ code repository. Given the Microsoft intends to fold C++ AMP into Visual Studio and Windows 8 Metro, AMD will potentially have a way to connect HSA with the enormous contingent of Windows developers and users.

The question remains whether Intel, NVIDIA and at least some of the ARM vendors will buy into AMD’s version of heterogeneous computing. Although Rogers said they have passed the HSA spec along to some of its competitors and received some feedback, AMD is not ready to name names. In general, Intel and NVIDIA are willing to embrace any open standard that their customer base is willing to adopt, but each also has in-house parallel frameworks to tout — CUDA for NVIDIA, and Threading Building Blocks and Cilk Plus for Intel — all of which are potentially hardware-agnostic. With AMD throwing HSA on the table, the competition for parallel computing mindshare just gets a little more interesting.