Adam Jackson (44):

egl: Make native display detection work more than once

egl/dri2: Don’t dlclose() the driver on dri2_load_driver_common failure

glx: Log the filename of the drm device if we fail to open it

Revert “glx: Lift sending the MakeCurrent request to top-level code”

glx: Lift sending the MakeCurrent request to top-level code

glx: Move vertex array protocol state into the indirect backend

libgbm: Wire up getCapability for the image loader

egl/wayland: Implement getCapability for the dri2 and image loaders

glx: Avoid atof() when computing the server’s GLX version

docs: Update bug report URLs for the gitlab migration

gallium/xlib: Fix glXMakeCurrent(dpy, None, None, ctx)

gallium/xlib: Remove drawable caching from the MakeCurrent path

egl/dri2: Refuse to add EGLConfigs with no supported surface types

Revert “glx: Unset the direct_support bit for GLX_EXT_import_context”

glx: Unset the direct_support bit for GLX_EXT_import_context

Alan Coopersmith (6):

intel/common: include unistd.h for ioctl() prototype on Solaris

meson: recognize “sunos” as the system name for Solaris

util: Workaround lack of flock on Solaris

util: Make Solaris implemention of p_atomic_add work with gcc

c99_compat.h: Don’t try to use ‘restrict’ in C++ code

gallium: Fix a bunch of undefined left-shifts in u_format_*

Alejandro Piñeiro (5):

v3d: adds an extra MOV for any sig.ld*

v3d: take into account prim_counts_offset

i965: enable ARB_gl_spirv extension and ARB_spirv_extensions for gen7+

Alex Smith (1):

radv: Change memory type order for GPUs without dedicated VRAM

Alexandros Frantzis (1):

Alyssa Rosenzweig (220):

pipe-loader: Build kmsro loader for with all kmsro targets

pipe-loader: Default to kmsro if probe fails

pan/midgard: Do not repeatedly spill same value

pan/midgard: Allow COMPUTE jobs in panfrost_bo_access_for_stage

pan/midgard: Don’t try to propagate swizzles to branches

pan/midgard: Allow non-contiguous masks in UBO lowering

pan/midgard: Replace mir_is_live_after with new pass

pan/midgard: Don’t try to OR live_in of successors

pan/midgard: Allow scheduling conditions with constants

pan/midgard: Allow writeout to see into the future

pan/midgard: Allow 6 instructions per bundle

pan/midgard: Only one conditional per bundle allowed

pan/midgard: Use new scheduler

pan/decode: Use portable format specifier for 64-bit

pan/decode: Use %zu instead of %d

pan/midgard: Do not propagate swizzles into writeout

pan/midgard: Print MIR by the bundle

pan/midgard: Allow NULL argument in mir_has_arg

pan/midgard: csel_swizzle with mir get swizzle

pan/midgard: Ensure fragment writeout is in the final block

panfrost: Remove vertex buffer offset from its size

pan/decode: Validate, but do not print, index buffer

pan/decode: Promote <no shader> to an error

pan/decode: Guard texture unknowns as zero trips

panfrost: Do not expose PIPE_CAP_TEXTURE_MIRROR_CLAMP

panfrost: Fix scoreboarding with dependency on job #0

pan/decode: Validate AFBC fields are zero when AFBC is disabled

pan/decode: Do not print uniform/buffers explicitly

pan/decode: Check for a number of potential issues

panfrost: Move pan_tiler.c outside of Gallium

panfrost: Set workgroups z to 32 for non-instanced graphics

Andreas Baierl (5):

lima: Fix crash when there are no vertex shader attributes

lima/ppir: Add various varying fetch sources to disassembler

Andreas Gottschling (1):

Andres Gomez (12):

egl: Remove the 565 pbuffer-only EGL config under X11.

docs/relnotes: add support for GL_ARB_gl_spirv, GL_ARB_spirv_extensions and OpenGL 4.6 on i965 and iris

i965/fs: set rounding mode when emitting the flrp instruction

i965/fs: add a comment about how the rounding mode in fmul is set

docs: Add the maximum implemented Vulkan API version in 19.3 rel notes

docs: Add the maximum implemented Vulkan API version in 19.2 rel notes

docs: Add the maximum implemented Vulkan API version in 19.1 rel notes

docs: Update to OpenGL 4.6 in the release notes

nir/algebraic: mark float optimizations returning one parameter as inexact

Andres Rodriguez (2):

Andrii Simiklit (1):

Anuj Phogat (5):

intel/isl/icl: Use halign 8 instead of 4 hw workaround

intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM

Arcady Goldmints-Orlov (1):

Bas Nieuwenhuizen (63):

radv: Do not change scratch settings while shaders are active.

radv: Close all unnecessary fds in secure compile.

radv: Split semaphore into two parts as enum+union.

radv: Always enable syncobj when supported for all fences/semaphores.

radv: Do sparse binding in queue submission.

radv: Add an early exit in the secure compile if we already have the cache entries.

radv: Compute hashes in secure process for secure compilation.

radv: Check the size of the imported buffer.

radv: Delay patching for imported images until layout time.

radv: Split out layout code from image creation.

radv: Fix condition for skipping the continue CS.

turnip: Always use UINT formats for copies.

radv: Add workaround for hang in The Surge 2.

amd: Build aco only if radv is enabled

radv: Disable dfsm by default even on Raven.

radv: Only break batch on framebuffer change with dfsm.

radv: Emit VGT_GS_ONCHIP_CNTL for tess on GFX10.

radv: Use correct vgpr_comp_cnt for VS if both prim_id and instance_id are needed.

Ben Crocker (1):

llvmpipe: use ppc64le/ppc64 Large code model for JIT-compiled shaders

Boris Brezillon (73):

panfrost: Make sure we reset the damage region of RTs at flush time

panfrost: Fix the DISCARD_WHOLE_RES case in transfer_map()

panfrost: Draw the wallpaper when only depth/stencil bufs are cleared

panfrost: Make sure a clear does not re-use a pre-existing batch

panfrost: Get rid of the flush in panfrost_set_framebuffer_state()

panfrost: Kill the explicit serialization in panfrost_batch_submit()

panfrost: Do fine-grained flushing when preparing BO for CPU accesses

panfrost: Make sure the BO is ‘ready’ when picked from the cache

panfrost: Add flags to reflect the BO imported/exported state

panfrost: Use the per-batch fences to wait on the last submitted batch

panfrost: Extend the panfrost_batch_add_bo() API to pass access flags

panfrost: Add the shader BO to the batch in patch_shader_state()

dEQP-GLES2.functional.buffer.write.use.index_array.* are passing now.

Revert “panfrost: Rework midgard_pair_load_store() to kill the nested foreach loop”

panfrost: Don’t return imported/exported BOs to the cache

panfrost: Stop using panfrost_bo_release() outside of pan_bo.c

panfrost: Stop passing screen around for BO operations

panfrost: Don’t check if BO is mmaped before calling panfrost_bo_mmap()

panfrost: Move the BO API to its own header

panfrost: Get rid of pan_drm.c

panfrost: Add polygon_list to the batch BO set at allocation time

panfrost: Use the correct type for the bo_handle array

panfrost: Move the batch submission logic to panfrost_batch_submit()

panfrost: Move the fence creation in panfrost_flush()

panfrost: Prepare things to avoid flushes on FB switch

panfrost: Use ctx->wallpaper_batch in panfrost_blit_wallpaper()

panfrost: Allow testing if a specific batch is targeting a scanout FB

panfrost: Get rid of the unused ‘flush jobs accessing res’ infra

panfrost: Use a pipe_framebuffer_state as the batch key

panfrost: Rework midgard_pair_load_store() to kill the nested foreach loop

panfrost: Get rid of the now unused SLAB allocator

panfrost: Get rid of unused panfrost_context fields

panfrost: Make transient allocation rely on the BO cache

panfrost: Stop passing a ctx to functions being passed a batch

panfrost: Reset the damage area on imported resources

panfrost: Use ralloc() to allocate instructions to avoid leaking those objs

Revert “panfrost: Free all block/instruction objects before leaving midgard_compile_shader_nir()”

panfrost: Make sure bundle.instructions[] contains valid instructions

panfrost: Free all block/instruction objects before leaving midgard_compile_shader_nir()

panfrost: Free the instruction object in mir_remove_instruction()

Brian Paul (3):

Call shmget() with permission 0600 instead of 0777

Caio Marcelo de Oliveira Filho (66):

anv: Initialize depth_bounds_test_enable when not explicitly set

spirv: Don’t leak GS initialization to other stages

spirv: Don’t fail if multiple ordering semantics bits are set

anv: Fix output of INTEL_DEBUG=bat for chained batches

spirv: Add helper to find args of Image Operands

spirv: Check that only one offset is defined as Image Operand

vulkan: Update the XML and headers to 1.1.125

i965: Disable fast clears when running with INTEL_DEBUG=nofc

iris: Disable fast clears when running with INTEL_DEBUG=nofc

anv: Disable fast clears when running with INTEL_DEBUG=nofc

vulkan: Update the XML and headers to 1.1.124

spirv: Update JSON and headers to 1.5

mesa/st: Fallback to name lookup when the variable have no Parameter

glsl/nir: Add and use a gl_nir_link() function

mesa/spirv: Set a few more extensions

mesa/st: Don’t expect prog->nir to already exist

mesa/st: Lookup parameters without using names

mesa/program: Associate uniform storage without using names

mesa: Fill Parameter storage indices even when not using SPIR-V

glsl/nir: Fill in the Parameters in NIR linker

mesa/st: Do not rely on name to identify special uniforms

iris: Guard GEN9-only function in Iris state to avoid warning

Chris Wilson (2):

Christian Gmeiner (13):

etnaviv: keep track of buffer valid ranges for PIPE_BUFFER

etnaviv: output the same shader-db format as freedreno, v3d and intel

etnaviv: nir: start to make use of compile_error(..)

gallium: util_set_vertex_buffers_mask(..): make use of u_bit_consecutive(..)

Clément Guérin (1):

Connor Abbott (40):

nir/sink: Don’t sink load_ubo to outside of its defining loop

lima/gpir: Don’t emit movs when translating from NIR

lima/gpir: Use registers for values live in multiple blocks

lima/gpir: Only try to place actual children

lima/gpir: Do all lowerings before rsched

gallium: Plumb through a way to disable GLSL const lowering

st/nir: Call nir_remove_unused_variables() in the opt loop

ttn: Fill out more info fields

ac/nir: add a workaround for viewing a slice of 3D as a 2D image

st/nir: Fix num_inputs for VS inputs

Daniel Kolesa (1):

Daniel Schürmann (44):

aco: fix a couple of value numbering issues

aco: preserve kill flag on moved operands during RA

aco: fix accidential reordering of instructions when scheduling

aco: only use single-dword loads/stores for spilling

aco: fix immediate offset for spills if scratch is used

aco: always set scratch_offset in startpgm

aco: ensure that spilled VGPR reloads are done after p_logical_start

aco: simplify calculation of target register pressure when spilling

aco: consider loop_exit blocks like merge blocks, even if they have only one predecessor

aco: don’t insert the exec mask into set of live-out variables when spilling

aco: add can_reorder flags to load_ubo and load_constant

aco: only skip RAR dependencies if the variable is killed somewhere

aco: ensure that uniform booleans are computed in WQM if their uses happen in WQM

aco: don’t combine minmax3 if there is a neg or abs modifier in between

aco: don’t reorder instructions in order to lower boolean phis

aco: only emit waitcnt on loop continues if we there was some load or export

radv/aco: Setup alternate path in RADV to support the experimental ACO compiler

Daniel Stone (1):

Danilo Spinella (1):

Danylo Piliaiev (10):

i965: Unify CC_STATE and BLEND_STATE atoms on Haswell as a workaround

glsl: Initialize all fields of ir_variable in constructor

intel/compiler: Fix C++ one definition rule violations

st/nine: Ignore D3DSIO_RET if it is the last instruction in a shader

glsl: Fix unroll of do{} while(false) like loops

nir/loop_unroll: Prepare loop for unrolling in wrapper_unroll

nir/loop_unroll: Update the comments for loop_prepare_for_unroll

Dave Airlie (75):

zink: attempt to get multisample resource creation right

zink/spirv: store all values as uint.

zink: ask for flatshade lowering

gallivm/draw/swr: make the gs_iface not depend on tgsi.

gallivm: fix coroutines on aarch64 with llvm 8

gallium: add a a new cap for changing the TGSI TG4 instruction encoding

gallivm/sample: add gather component selection to the key.

llvmpipe/draw: handle UBOs that are < 16 bytes.

docs: add llvmpipe features for fb_no_attach and compute shaders

llvmpipe: enable compute shaders if LLVM has coroutines

llvmpipe: introduce new state dirty tracking for compute.

gallivm: fix appveyor build after images changes

gallivm: add support for fences api on older llvm

llvmpipe: move the fragment shader variant key to dynamic length.

virgl: fix format conversion for recent gallium changes.

Dave Stevenson (1):

broadcom/v3d: Allow importing linear BOs with arbitrary offset/stride.

Duncan Hopkins (7):

zink: make sure src image is transfer-src-optimal

zink: Use optimal layout instead of general. Reduces valid layer warnings. Fixes RADV image noise.

zink: pass line width from rast_state to gfx_pipeline_state.

zink: limited uniform buffer size so the limits is not exceeded.

zink: clamped limits to INT_MAX when stored as uint32_t.

Dylan Baker (120):

Revert “egl: move #include of local headers out of Khronos headers”

meson/broadcom: libbroadcom_cle also needs zlib

meson: Add dep_glvnd to egl deps when building with glvnd

nir: correct use of identity check in python

gitlab-ci: Add a job for meson on windows

gitlab-ci: refactor out some common stuff for Windows and Linux

docs: update releasing process to use new scripts and gitlab

bin/gen_release_notes.py: Add a warning if new features are introduced in a point release

bin/post_version.py: Pass version as an argument

bin/gen_release_notes.py: Return “None” if there are no new features

docs: update calendar, add news item and link release notes for 19.2.2

docs: Add release not about scons deprecation

scons: Also print a deprecation warning on windows

scons: Print a deprecation warning about using scons on not windows

meson: Require meson >= 0.49.1 when using icc or icl

docs: Add new feature for compiling for windows with meson

appveyor: Add support for building llvmpipe with meson

meson: Use cmake to find LLVM when building for windows

gitlab-ci: Set the meson wrapmode to disabled

Revert “gitlab-ci: Disable meson-mingw32-x86_64 job again for now”

meson: Don’t use expat on windows

appveyor: Add support for meson as well as scons on windows

meson: glcpp tests are expected to fail on windows

meson: only build timspec test if timespec is available

meson: don’t error on formaters with mingw

meson: don’t build or run mesa-sha1 test on windows

meson: Set visibility and compat args for graw

meson: add switches for SWR with MSVC

meson: force inclusion of inttypes.h for glcpp with msvc

meson: Add support for using win_flex and win_bison on windows

meson: don’t look for rt on windows

meson: Don’t check for posix_memalign on windows

meson: fix gallium-osmesa to build for windows

meson: Add necessary defines for mesa_gallium on windows

util: use _WIN32 instead of WIN32

docs: update calendar, add news item, and link release notes for 19.2.1

meson: Only error building gallium video without libdrm when the platform is drm

docs: Add use of Closes: tag for closing gitlab issues

docs: use https for mesonbuild.com

meson: Try finding libxvmcw via pkg-config before using find_library

meson: fix logic for generating .pc files with old glvnd

bin/get-pick-list: use –oneline=pretty instead of –oneline

docs: update calendar, add news item, and link release notes for 19.2.0

scons: Make scons and meson agree about path to glapi generated headers

Docs: mark that 19.2.0-rc3 has been released

meson: don’t allow glvnd on windows

meson: don’t build glx or dri by default on windows

meson: build getopt when using msvc

meson: fix dl detection on non cygwin windows

glapi: export glapi_destroy_multithread when building shared-glapi on windows

meson: don’t try to generate i18n translations on windows

docs: Mark 19.2.0-rc2 as done and push back rc3 and rc4/final

Eduardo Lima Mitev (4):

freedreno/ir3: Add a NIR pass to select tex instructions eligible for pre-fetch

Emil Velikov (3):

Eric Anholt (57):

ci: Disable lima until its farm can get fixed.

mesa: Redefine the RG formats as array formats.

mesa: Replace MESA_FORMAT_L8A8/A8L8 UNORM/SNORM/SRGB with an array format.

mesa: Replace the LA16_UNORM packed formats with one array format.

radeon: Drop the unused first arg of OUT_BATCH_RELOC.

radeon: Fill in the TXOFFSET field containing the tile bits in our relocs.

r100/r200: factor out txformat/txfilter setup from the TFP path.

mesa: Refactor the entirety of _mesa_format_matches_format_and_type().

mesa: Add support for array formats of depth and stencil.

freedreno/ci: Ban texsubimage2d_pbo.r16ui_2d, due to two flakes reported.

turnip: Emit clears of gmem using linear.

turnip: Set up the correct tiling mode for small attachments.

turnip: Tell spirv_to_nir that we want fragcoord as a sysval.

turnip: Fill in clear color packing for r10g11b11 and rgb9e5.

nir: Fix some wonky whitespace in nir_search.h.

nir: Factor out most of the algebraic passes C code to .c/.h.

nir: Keep the range analysis HT around intra-pass until we make a change.

nir: Skip emitting no-op movs from the builder.

nir: Make nir_search’s dumping go to stderr.

v3d: Enable the late algebraic optimizations to get real subs.

shader_enums: Move MAX_DRAW_BUFFERS to this file.

freedreno/a3xx: Mostly fix min-vs-mag filtering decisions on non-mipmap tex.

freedreno: Fix invalid read when a block has no instructions.

gitlab-ci: Make the test job fail when bugs are unexpectedly fixed.

egl/android: Fix build since the DRI fourcc removal.

gitlab-ci: Log the driver version that got tested.

dri: Use DRM_FORMAT_* instead of defining our own copy.

gallium/osmesa: Move 565 format selection checks where the rest are.

gallium/osmesa: Fix a race in creating the stmgr.

freedreno: Fix the type of single-component scaled vertex attrs.

gallium: Drop a bit of dead code from the pack/unpack python.

gallium: Drop the useless union wrapper on pack/unpack.

gallium: Skip generating the pack/unpack union if we don’t use it.

gallium: Fix mesa format name in unit test failure path.

gallium: Add block depth to the format utils.

gallium: Add a block depth field to the u_formats table.

Eric Engestrom (104):

egl: move #include of local headers out of Khronos headers

loader: default to iris for all future PCI IDs

travis: test meson install as well

util/u_atomic: fix return type of p_atomic_{inc,dec}_return() and p_atomic_{cmp,}xchg()

gbm: use size_t for array indexes

meson: split headers one per line

meson: move a couple of include installs around

meson: rename `glvnd_missing_pc_files` to `not glvnd_has_headers_and_pc_files`

meson: rename libnir to _libnir to make it clear it’s not meant to be used anywhere else

meson: use idep_nir instead of libnir in pipe-loader

meson: use idep_nir instead of libnir in haiku softpipe

meson: use idep_nir instead of libnir in gallium nine

meson: use idep_nir instead of libnir in libclnir

meson: use idep_nir instead of libnir in libnouveau

loader: use ARRAY_SIZE instead of NULL sentinel

glsl: turn runtime asserts of compile-time value into compile-time asserts

meson: re-add incorrect pkg-config files with GLVND for backward compatibility

meson: split more compiler options to their own line

meson: split compiler warnings one per line

gitlab-ci: rename stages to something simpler

meson/v3d: replace partial list of nir dep files with idep_nir_headers

meson/iris: replace partial list of nir dep files with idep_nir_headers

amd: move adaptive sync to performance section, as it is defined in xmlpool

gallivm: drop LLVM<3.3 code paths as no build system allows that

llvmpipe: replace more complex 3.x version check with LLVM_VERSION_MAJOR/MINOR

clover: replace more complex 3.x version check with LLVM_VERSION_MAJOR/MINOR

gallivm: replace more complex 3.x version check with LLVM_VERSION_MAJOR/MINOR

egl: warn user if they set an invalid EGL_PLATFORM

swr: use LLVM version string instead of re-computing it

llvmpipe: use LLVM version string instead of re-computing it

scons: define MESA_LLVM_VERSION_STRING like the other build systems do

Erico Nunes (7):

Erik Faye-Lund (210):

zink: do not advertize coherent mapping

zink: always allow mutating the format

zink: use actual format for render-pass

zink: emit line-width when using polygon line-mode

zink: only enable KHR_external_memory_fd if supported

zink: use bitfield for dirty flagging

zink: use dynamic state for line-width

st/mesa: lower global vars to local after lowering clip

gitlab-ci: also build Zink on CI

zink: do not set lineWidth to invalid value

zink: use VK_FORMAT_B8G8R8A8_UNORM for PIPE_FORMAT_B8G8R8X8_UNORM

zink: do not set VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT for non-3D textures

zink/spirv: alias var0 on tex0 etc instead

zink/spirv: alias generic varyings on non-generic ones

zink: do not lower bools to float

zink/spirv: use bit_size instead of hard-coding

zink: disable PIPE_CAP_QUERY_TIME_ELAPSED for now

zink: use primconvert to get rid of 8-bit indices

zink: do not use both depth and stencil aspects for sampler-views

zink/spirv: always enable Sampled1D for fragment shaders

zink: don’t crash when setting rast-state to NULL

zink: set ExecutionModeDepthReplacing when depth is written

zink: ensure layout is reasonable before copying

zink/spirv: be a bit more strict with fragment-results

zink: wait for transfer when reading

zink: make sure imageExtent.depth is 1 for arrays

zink: process one aspect-mask bit at the time

zink: use pipe_stencil_ref instead of uint32_t-array

zink: only consider format-desc if checking details

zink: do not lower io

zink: do not use hash-table for regs

zink: keep a reference to used render-passes

zink: pass screen instead of device to program-functions

zink: ensure non-fragment shaders use lod-versions of texture

zink: use uvec for undefs

zink: do not destroy staging-resource, deref it

zink: delete samplers after the current cmdbuf

zink: wait for idle on context-destroy

zink: return old fence from zink_flush

zink: reference renderpass and framebuffer from cmdbuf

zink: do not leak image-views

zink: prepare for caching of renderpases/framebuffers

Revert “vc4: do not report alpha-test as supported”

Revert “v3d: do not report alpha-test as supported”

Revert “nir: drop support for using load_alpha_ref_float”

mesa/st: assert that lowering is supported

nir: drop support for using load_alpha_ref_float

v3d: do not report alpha-test as supported

vc4: do not report alpha-test as supported

panfrost: do not report alpha-test as supported

nir: allow passing alpha-ref state to lowering-code

mesa/main: prefer R8-textures instead of A8 for glBitmap in display lists

nir: initialize needs_helper_invocations as well

.mailmap: add a couple of aliases for Jakob Bornecrantz

.mailmap: add an alias for Tomeu Vizoso

.mailmap: add an alias for Gert Wollny

.mailmap: add an alias for Alexandros Frantzis

.mailmap: specify spelling for Elie Tournier

loader/dri3: do not blit outside old/new buffers

.mailmap: add an alias for Frank Binns

.mailmap: add an alias for Bas Nieuwenhuizen

.mailmap: add an alias for Eric Engestrom

.mailmap: add an alias for Michel Dänzer

gallium/gdi: use GALLIUM_FOO rather than HAVE_FOO

util: only allow _BitScanReverse64 on 64-bit cpus

util: do not assume MSVC implies SSE

gallium/auxiliary/indices: consistently apply start only to input

Francisco Jerez (56):

intel/disasm/gen12: Fix disassembly of some common instruction controls.

intel/fs/gen12: Add scheduling information to the IR.

intel/eu/gen12: Add tracking of default SWSB state to the current brw_codegen instruction.

intel/eu/gen12: Add auxiliary type to represent SWSB information during codegen.

intel/fs/gen12: Add codegen support for the SYNC instruction.

intel/eu/gen12: Use SEND instruction for split sends.

intel/eu/gen12: Fix codegen of immediate source regions.

intel/eu/gen12: Add Gen12 opcode descriptions to the table.

intel/eu/gen11+: Mark dot product opcodes as unsupported on opcode_descs table.

intel/eu/gen12: Add sanity-check asserts to brw_inst_bits() and brw_inst_set_bits().

intel/ir: Represent physical edge of ELSE instruction.

intel/ir: Add helper function to push block onto CFG analysis stack.

intel/ir: Represent physical and logical subsets of the CFG.

intel/ir: Drop hard-coded correspondence between IR and HW opcodes.

intel/eu: Rework opcode description tables to allow efficient look-up by either HW or IR opcode.

intel/eu: Fix up various type conversions in brw_eu.c that are illegal C++.

intel/eu: Split brw_inst ex_desc accessors for SEND(C) vs. SENDS(C).

intel/fs: Define is_payload() method of the IR instruction class.

intel/fs: Teach fs_inst::is_send_from_grf() about some missing send-like instructions.

Fritz Koenig (5):

mesa: Allow MESA_framebuffer_flip_y for GLES 3

Gert Wollny (4):

r600: Disable eight bit three channel formats

etnaviv: enable triangle strips only when the hardware supports it

radeonsi: Release storage for smda_uploads when the context is destroyed

Greg V (1):

clover: use iterator_range in get_kernel_nodes

Gurchetan Singh (4):

Haihao Xiang (1):

i965: support AYUV/XYUV for external import only

Hal Gentz (11):

Revert “egl: Fixes transparency with EGL and X11.”

Revert “egl: Puts RGBA visuals in the second config selection group.”

Revert “egl: Configs w/o double buffering support have no `EGL_WINDOW_BIT`.”

egl: Configs w/o double buffering support have no `EGL_WINDOW_BIT`.

egl: Puts RGBA visuals in the second config selection group.

egl: Fixes transparency with EGL and X11.

gallium/osmesa: Fix the inability to set no context as current.

glx: Fix SEGV due to dereferencing a NULL ptr from XCB-GLX.

Heinrich Fink (8):

Hyunjun Ko (3):

Iago Toral (1):

Iago Toral Quiroga (13):

st/mesa: only require ESSL 3.1 for geometry shaders

v3d: request the kernel to flush caches when TMU is dirty

broadcom: document known hardware issues for L2T flush command

v3d: add new flag dirty TMU cache at v3d_compiler

v3d: fix TF primitive counts for resume without draw

v3d: make sure we have enough space in the CL for the primitive counts packet

gallium/ttn: VARYING_SLOT_PSIZ and VARYING_SLOT_FOGC are scalar

Ian Romanick (22):

intel/compiler: Fix ‘comparison is always true’ warning

intel/fs: Disable conditional discard optimization on Gen4 and Gen5

nir/algebraic: Mark other comparison exact when removing a == a

nir/algebraic: Add the ability to mark a replacement as exact

intel/compiler: Report the number of non-spill/fill SEND messages on vec4 too

intel/vec4: Don’t try both sources as immediates for DPH

nir/search: Fix possible NULL dereference in is_fsign

nir/range-analysis: Use types to provide better ranges from bcsel and mov

nir/range-analysis: Use types in the hash key

nir/range-analysis: Bail if the types don’t match

nir/algebraic: Do not apply late DPH optimization in vertex processing stages

nir/range-analysis: Add a lot more assertions about the contents of tables

nir/range-analysis: Handle constants in nir_op_mov just like nir_op_bcsel

nir/range-analysis: Adjust result range of multiplication to account for flush-to-zero

nir/range-analysis: Adjust result range of exp2 to account for flush-to-zero

nir/algebraic: Clean up value range analysis-based optimizations

nir/algebraic: Mark some value range analysis-based optimizations imprecise

nir/algrbraic: Don’t optimize open-coded bitfield reverse when lowering is enabled

Icenowy Zheng (4):

lima: do not set the PP uniforms address lowest bits

lima: reset scissor state if scissor test is disabled

Ilia Mirkin (6):

nv50/ir: mark STORE destination inputs as used

gallium/tgsi: add support for DEMOTE and READ_HELPER opcodes

gallium/vl: use compute preference for all multimedia, not just blit

Illia Iorin (2):

Indrajit Das (1):

James Xiong (5):

iris: try to set the specified tiling when importing a dmabuf

gallium: do not increase ref count of the new throttle fence

Jan Beich (6):

util: detect AltiVec at runtime on BSDs

util: skip AltiVec detection if built with -maltivec

util: detect NEON at runtime on FreeBSD

util: skip NEON detection if built with -mfpu=neon

Jan Zielinski (3):

Jason Ekstrand (57):

anv: Re-emit all compute state on pipeline switch

anv: Set up SBE_SWIZ properly for gl_Viewport

anv: Set the batch allocator for compute pipelines

anv: Avoid emitting UBO surface states that won’t be used

anv: Reduce the minimum number of relocations

intel/isl: Add new aux modes available on gen12

intel/blorp: Use surf instead of aux_surf for image dimensions

intel/isl: Select Y-tiling for stencil on gen12

intel/eu/validate/gen12: Don’t blow up on indirect src0.

nir/repair_ssa: Replace the unreachable check with the phi builder

intel/fs: Do 8-bit subgroup scan operations in 16 bits

intel/fs: Allow CLUSTER_BROADCAST to do type conversion

intel/fs: Allow UB, B, and HF types in brw_nir_reduction_op_identity

util/rb_tree: Reverse the order of comparison functions

Move blob from compiler/ to util/

vulkan: Update the XML and headers to 1.1.123

nir/dead_cf: Repair SSA if the pass makes progress

intel/blorp: Use wide formats for nicely aligned stencil clears

blorp: Memset surface info to zero when initializing it

Revert “intel/fs: Move the scalar-region conversion to the generator.”

intel/fs: Drop the gl_program from fs_visitor

v3d: Use the correct opcodes for signed image min/max

intel/nir: Add a helper for getting BRW_AOP from an intrinsic

Jean Hertel (1):

Jiadong Zhu (1):

Jiang, Sonny (1):

loader: always map the “amdgpu” kernel driver name to radeonsi (v2)

John Stultz (1):

Jon Turney (2):

rbug: Fix use of alloca() without #include “c99_alloca.h”

Jonathan Gray (3):

i965: update Makefile.sources for perf changes

Jonathan Marek (90):

freedreno/a2xx: use sysval for pointcoord

turnip: use nir_assign_io_var_locations instead of nir_assign_var_locations

turnip: update some shader state bits from GL driver

turnip: add anisotropy and compressed formats to device features

turnip: disable tiling as necessary

etnaviv: get addressing mode from tiling layout

etnaviv: clear texture cache and flush ts when texture is modified

etnaviv: nir: use store_deref instead of store_output

qetnaviv: nir: use new immediates when possible

turnip: add some shader information in pipeline state

turnip: use linear tiling for scanout image

turnip: use image tile_mode for gmem configuration

freedreno/a2xx: ir2: check opcode on the right instruction in export cp

freedreno/a2xx: ir2: fix lowering of instructions after float lowering

Jordan Justen (42):

iris: Allow max dynamic pool size of 2GB for gen12

iris: Set MOCS for external surfaces to uncached

iris: Mark aux-map BO as used by all batches

iris: Map each surf to it’s aux-surf in the aux-map tables

iris/resource: Use isl surface alignment during bo allocation

iris: Let isl decide the supported tiling in more situations

i965: Exit with error if gen12+ is detected

intel/l3: Don’t assert on gen12 (use gen11 config temporarily)

intel/compiler: Disable compaction on gen12 for now

intel/genxml: Add gen12.xml as a copy of gen11.xml

intel/genxml: Run sort_xml.sh to tidy gen9.xml and gen11.xml

intel/genxml: Handle field names with different spacing/hyphen

Jose Maria Casanova Crespo (5):

v3d: writes to magic registers aren’t RF writes after THREND

José Fonseca (5):

Juan A. Suarez Romero (14):

docs: update calendar, add news item and link release notes for 19.1.8

bin/get-pick-list.sh: sha1 commits can be smaller than 8 chars

docs: update calendar, add news item and link release notes for 19.1.7

docs: update calendar, add news item and link release notes for 19.1.6

docs: update calendar, add news item and link release notes for 19.1.5

Karol Herbst (15):

st/mesa: fix crash for drivers supporting nir defaulting to tgsi

nv50/ir/nir: comparison of integer expressions of different signedness warning

clover/nir: fix compilation with g++-5.5 and maybe earlier

clover: add support for passing kernels as nir to the driver

clover: add support for drivers having no proper binary format

Ken Mays (1):

Kenneth Graunke (86):

drirc: Set vs_position_always_invariant for Shadow of Mordor on Intel

iris: Fix “Force Zero RTA Index Enable” setting again

nir: Use VARYING_SLOT_TESS_MAX to size indirect bitmasks

intel/compiler: Report the number of non-spill/fill SEND messages

mesa: Use ctx->ReadBuffer in glReadBuffer back-to-front tests

iris: Update comment about 3-component formats and buffer textures

iris: Drop vtbl usage for some load_register calls

iris: Refactor push constant allocation so we can reuse it

iris: Fix iris_rebind_buffer() for VBOs with non-zero offsets.

iris: Only resolve for image levels/layers which are actually in use.

Revert “intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM”

st/mesa: Bail on incomplete attachments in discard_framebuffer

iris: Rework iris_update_draw_parameters to be more efficient

iris: Use state_refs for draw parameters.

iris: Avoid uploading SURFACE_STATE descriptors for UBOs if possible

intel/compiler: Record whether any pull constant loads occur

iris: Explicitly emit 3DSTATE_BTP_XS on Gen9 with DIRTY_CONSTANTS_XS

iris: Skip allocating a null surface when there are 0 color regions.

iris: Initialize ice->state.prim_mode to an invalid value

st/mesa: Only pause queries if there are any active queries to pause.

iris: Finish initializing the BO before stuffing it in the hash table

iris: Avoid flushing for cache history on transfer range flushes

iris: Add support for the always_flush_cache=true debug option.

iris: Report correct number of planes for planar images

iris: Lessen texture cache hack flush for blits/copies on Icelake.

iris: Fix partial fast clear checks to account for miplevel.

iris: Don’t auto-flush/dirty on transfer unmap for coherent buffers

intel/compiler: Use new Gen11 headerless RT writes for MRT cases

intel/compiler: Use generic SEND for Gen7+ FB writes

iris: Set MOCS in all STATE_BASE_ADDRESS commands

iris: Update fast clear colors on Gen9 with direct immediate writes.

gallium/rbug: Wrap resource_get_param if available

gallium/trace: Wrap resource_get_param if available

gallium/ddebug: Wrap resource_get_param if available

Kevin Strasser (14):

gallium: Add buffer and configs handling or fp16 formats

gbm: Add buffer handling and visuals for fp16 formats

egl: Convert configs to use shifts and sizes instead of masks

gallium: Use consistent approach for config format filtering

Khaled Emara (2):

Kristian Høgsberg (40):

nir: Use BITSET for tracking varyings in lower_io_arrays

st/mesa: Also enable GS when ESSLVersion > 320

freedreno/ir3: End VS with CHMASK and CHSH in GS pipelines

freedreno/ir3: Start GS with (ss) and (sy)

freedreno/ir3: Setup ir3 inputs and outputs for GS

freedreno/ir3: Implement lowering passes for VS and GS

freedreno/ir3: Add intrinsics that map to LDLW/STLW

freedreno/ir3: Extend RA with mechanism for pre-coloring registers

freedreno/ir3: Use third register for offset for LDL and LDLV

freedreno/ir3: Add support for CHSH and CHMASK instructions

freedreno/a6xx: Trim a few regs from fd6_emit_restore()

freedreno/registers: Update with GS, HS and DS registers

freedreno/a6xx: Move instrlen and obj_start writes to fd6_emit_shader

freedreno/a6xx: Emit const and texture state for HS/DS/GS

freedreno/ir3: Add HS/DS/GS to shader key and cache

freedreno: Rename vp and fp to vs and fs in fd_program_stateobj

freedreno/a6xx: Write multiple regs for SP_VS_OUT_REG and SP_VS_VPC_DST_REG

freedreno/a6xx: Track location of gl_Position out as we link it

freedreno/a6xx: Let the GPU track streamout offsets

Krzysztof Raszkowski (2):

Laurent Carlier (1):

Leo Liu (3):

radeonsi: enable 8K video decode support for HEVC and VP9

Lepton Wu (14):

gallium: dri2: Use index as plane number.

mapi: Clean up entry_patch_public for x86 tls

egl/android: Remove our own reference to buffers.

egl/android: Only keep BGRA EGL configs as fallback

st/mesa: Allow zero as [level|layer]_override

Lionel Landwerlin (59):

intel/perf: simplify the processing of OA reports

intel/perf: take into account that reports read can be fairly old

intel/perf: set read buffer len to 0 to identify empty buffer

anv/wsi: signal the semaphore in the acquireNextImage

anv: invalidate file descriptor of semaphore sync fd at vkQueueSubmit

mesa: check framebuffer completeness only after state update

intel/dev: store whether the device uses an aux map tables on devinfo

intel/perf: move registers to their own header

intel/error2aub: add support for platforms without PPGTT

mesa: don’t forget to clear _Layer field on texture unit

intel: use proper label for Comet Lake skus

util/timespec: use unsigned 64 bit integers for nsec values

radeonsi: take reference glsl types for compile threads

mesa/compiler: rework tear down of builtin/types

compiler: ensure glsl types are not created without a reference

nir/tests: take reference on glsl types

glsl/tests: take refs on glsl types

Lucas Stach (17):

etnaviv: check for softpin availability on Halti5 devices

etnaviv: rework the stream flush to always go through the context flush

etnaviv: keep references to pending resources

gallium/util: don’t depend on implementation defined behavior in listen()

Marek Olšák (161):

st/mesa: fix Sanctuary and Tropics by disabling ARB_gpu_shader5 for them

winsys/amdgpu: use the new GPU reset query

ac: get tcc_harvested from the kernel

radeonsi: initialize shader compilers in threads on demand

egl: implement new functions from EGL_EXT_image_flush_external

st/dri: assume external consumers of back buffers can write to the buffers

include: add the definition of EGL_EXT_image_flush_external

glsl/serialize: optimize for equal offsets in uniform remap tables

st/mesa: update VS shader_info for NIR after lowering passes

st/mesa: assign driver locations for VS inputs for NIR before caching

st/mesa: don’t lower_global_vars_to_local for VS if there are no dead inputs

st/mesa: move some NIR lowering before shader caching

util/u_queue: skip util_queue_finish if num_threads is 0

util/disk_cache: finish all queue jobs in destroy instead of killing them

st/mesa: replace pipe_shader_state with tgsi_token* in st_vp_variant

nir: allow nir_lower_uniforms_to_ubo to be run repeatedly

st/mesa: don’t call variables “tgsi” when they can reference NIR

st/mesa: remove st_vp_variant_key in favor of st_common_variant_key

st/mesa: lower doubles for NIR after linking

st/mesa: call st_nir_opts for linked shaders only once

radeonsi: call the reset callback if get_device_reset_status returns a failure

st/mesa: call the reset callback if glGetGraphicsResetStatus returns a failure

st/mesa: reorder and document code in st_translate_vertex_program

st/mesa: finalize NIR after shader variant passes for TCS/TES/GS/CS

st/mesa: clean up more after the removal of st_compute_program

st/mesa: remove st_compute_program in favor of st_common_program

st/mesa: don’t store stream output info to shader cache for tess ctrl shaders

st/mesa: simplify the signature of st_release_basic_variants

st/mesa: deduplicate code for ATI fs in st_program_string_notify

st/mesa: use *prog at the end of st_link_nir

st/mesa: always allocate pack/unpack buffers as staging

nir/drawpixels: fix what appears to be a copy-paste bug in get_texcoord_const

radeonsi: expand FMASK before MSAA image stores are used

radeonsi: add FMASK slots for shader images (for MSAA images)

radeonsi: set the sample index for shader images correctly

radeonsi: remove si_vid_join_surfaces and use combined planar allocations

vl: use u_format in vl_video_buffer_formats

amd: don’t use AMD_FAMILY definitions from amdgpu_drm.h

radeonsi: use simple_mtx_t instead of mtx_t

st/mesa: use simple_mtx_t instead of mtx_t

util: use simple_mtx_t for util_range

ac/surface: don’t allocate FMASK if there is no graphics

ac: reorder and print all radeon_info fields

ac: set the number of SDPs same as the number of TCCs

radeonsi/gfx10: fix corruption for chips with harvested TCCs

ac: fix incorrect vram_size reported by the kernel

radeonsi: initialize displayable DCC using the retile blit to prevent hangs

ac/nir: port Z compare value clamping from radeonsi

nir: define 8-byte size and alignment for bindless variables

nir: don’t add bindless variables to num_textures and num_images

amd: remove all PCI IDs supported by amdgpu

ac: stop using PCI IDs for chip identification

amd: add more PCI IDs for Navi14

radeonsi: include drm_fourcc.h to fix the build

gallium: extend resource_get_param to be as capable as resource_get_handle

ac: replace HAVE_LLVM with LLVM_VERSION_MAJOR for atomic-optimizations

radeonsi: move texture storage allocation outside of radeonsi

radeonsi: move HTILE allocation outside of radeonsi

r300,r600,radeonsi: set winsys_handle::stride,offset in drivers, not winsyses

r300,r600,radeonsi: read winsys_handle::stride,offset in drivers, not winsyses

radeonsi: only support at most 1024 threads per block

radeonsi: disable DCC when importing a texture from an incompatible driver

radeonsi/gfx10: use fma for TGSI_OPCODE_FMA

ac: use fma on gfx10

radeonsi: align scratch and ring buffer allocations for faster memory access

radeonsi: consolidate determining VGPR_COMP_CNT for API VS

radeonsi/gfx10: set PA_CL_VS_OUT_CNTL with CONTEXT_REG_RMW to fix edge flags

winsys/amdgpu+radeon: process AMD_DEBUG in addition to R600_DEBUG

radeonsi/gfx10: always use the legacy pipeline for streamout

radeonsi/gfx10: add as_ngg variant for VS as ES to select Wave32/64

radeonsi/gfx10: create the GS copy shader if using legacy streamout

radeonsi/gfx10: fix the PRIMITIVES_GENERATED query if using legacy streamout

radeonsi/gfx10: fix tessellation for the legacy pipeline

radeonsi: move some global shader cache flags to per-binary flags

radeonsi/gfx10: fix the legacy pipeline by storing as_ngg in the shader cache

Marek Vasut (4):

Marijn Suijten (2):

Matt Turner (6):

intel/compiler: Restructure instruction compaction in preparation for Gen12

Mauro Rossi (8):

Maya Rashish (3):

Michael Schellenberger Costa (1):

Michel Dänzer (48):

gitlab-ci: Disable meson-windows job for the time being

gitlab-ci: Only run the pipeline if any files affecting it have changed

gitlab-ci: Enable UBSan for the meson-vulkan job

util: Use uint64_t for shifting left in sign_extend and strunc

gallium/util: Cast to target type before shifting left

intel/fs: Check for NULL key in fs_visitor constructor

intel/compiler: Cast to target type before shifting left

intel/compiler: Don’t left-shift by >= the number of bits of the type

gitlab-ci: Update the meson cross file for LLVM_VERSION as well

gitlab-ci: Use native aarch64 runner for ARM build jobs

gitlab-ci: Explicitly list debian-10 in needs: for .deqp-test template

gitlab-ci: Bring ARM docker image install script in line with x86_64

gitlab-ci: Disable meson-mingw32-x86_64 job again for now

gitlab-ci/lava: Add needs: for container image to test jobs

loader: Simplify handling of the radeonsi driver

gitlab-ci: Set ccache path for cross compilers in meson cross file

gitlab-ci: Add test-container:arm64 to needs: for arm64 test jobs

gitlab-ci: Add needs: for x86 buster docker image

gitlab-ci: Declare needs: for stretch docker image

loader: Avoid use-after-free / use of uninitialized local variables

radeonsi: fix VAAPI segfault due to various bugs

gitlab-ci: Test scons with all LLVM versions

gitlab-ci: Use newer packages from backports by default

gitlab-ci: Pass –no-remove to apt-get where possible

gitlab-ci: Move dependencies/needs for meson-main job to .deqp-test

gitlab-ci: Simplify some job definitions by extending more similar jobs

gitlab-ci: Use multiple inheritance instead of YAML references

gitlab-ci: Add needs stanza to arm64_a306_gles2 job definition

gitlab-ci: Keep g++ from stretch when installing foreign toolchains

gitlab-ci: Use new needs: keyword

Michel Zou (1):

Nanley Chery (47):

iris: Fix import of multi-planar surfaces with modifiers

gallium: Store the image format in winsys_handle

iris: Allocate main and aux surfaces together

iris: Don’t leak the resource for unsupported modifier

intel: Fix and use HIZ_CCS write through mode

intel/blorp: Assert against HiZ in surface states

intel: Enable CCS_E for R24_UNORM_X8_TYPELESS on TGL+

intel: Enable CCS_E for some formats on Gen12

isl: Redefine the CCS layout for Gen12

isl: Add and use isl_tiling_flag_to_enum()

iris: Allow for non-Y-tiled aux allocation

isl/drm: Map HiZ and CCS tilings to Y

i965/miptree: Avoid -Wswitch for the Gen12 aux modes

isl: Round up some pitches to 512B for Gen12’s CCS

iris: Drop support for I915_FORMAT_MOD_Y_TILED_CCS on TGL+

Nataraj Deshpande (1):

Neil Armstrong (1):

Revert “ci: Disable lima until its farm can get fixed.”

Neil Roberts (6):

glsl/builtin: Add alternate versions of atan using new ops

glsl: Add opcodes for atan and atan2

nir/builtin: Add #include u_math.h to the header

nir/builder: Move nir_atan and nir_atan2 from SPIR-V translator

glsl: Store the precision for a function return type

OBATA Akio (1):

Paulo Zanoni (8):

intel/compiler: remove the operand restriction for src1 on GLK

intel/fs: don’t forget the stride at generate_shuffle

intel/fs: the maximum supported stride width is 16

intel/fs: roll the loop with the <0,1,0> additions in emit_scan()

intel/fs: make scan/reduce work with SIMD32 when it fits 2 registers

intel/fs: grab fail_msg from v32 instead of v16 when v32->run_cs fails

Pierre Moreau (5):

clover/llvm: Add functions for compiling from source to SPIR-V

clover/spirv: Add functions for parsing arguments, linking programs, etc.

meson: Check for SPIRV-Tools and llvm-spirv

Pierre-Eric Pelloux Prayer (1):

Pierre-Eric Pelloux-Prayer (23):

radeonsi: use gfx9.surf_offset to compute texture offset

mesa: enable msaa in clear_with_quad if needed

radeonsi: tell the shader disk cache what IR is used

Plamena Manolova (8):

anv: Implement new way for setting streamout buffers.

iris: Implement new way for setting streamout buffers.

anv: Set depthBounds to true in anv_GetPhysicalDeviceFeatures.

Prodea Alexandru-Liviu (4):

Meson: Remove lib prefix from graw and osmesa when building with Mingw. Also remove version sufix from osmesa swrast on Windows.

Qiang Yu (4):

lima: don’t use damage system when full damage

Rafael Antognolli (13):

intel/blorp/gen12: Set FWCC when storing the clear color.

intel/tools: Use common code for GGTT address allocation.

anv: Only re-emit non-dynamic state that has changed.

Rhys Perry (84):

nir/lower_io_to_vector: don’t create arrays when not needed

aco: propagate p_wqm on an image_sample’s coordinate p_create_vector

aco: fix new_demand calculation for first instructions

aco: try to group together VMEM loads of the same resource

aco: take LDS into account when calculating num_waves

Revert “aco: only emit waitcnt on loop continues if we there was some load or export”

aco: keep can_reorder/barrier when combining addition into SMEM

aco: add a few missing checks in value numbering

aco: don’t use p_as_uniform for vgpr sampler/image indices

aco: use can_accept_constant in valu_can_accept_literal

radv/aco: disable NGG when ACO is used

aco: Have s_waitcnt_vscnt write to NULL.

aco: Use the VOP3-only add/sub GFX10 instructions if needed.

aco: pad code with s_code_end on GFX10

aco: Allow literals on VOP3 instructions.

aco: move s_andn2_b64 instructions out of the p_discard_if

nir/constant_folding: add back and use constant_fold_state

nir/print: always use the right FILE *

aco: don’t remove the loop exec mask in transition_to_Exact()

aco: CSE readlane/readfirstlane/permute/reduce with the same exec mask

radv/aco: return a correct name and description for the backend IR

aco,radv/aco: get dissassembly for release builds if requested

radv/aco: actually disable ACO when unsupported

nir/opt_remove_phis: handle phis with no sources

radv: always emit a position export in gs copy shaders

radv: keep GS threads with excessive emissions which could write to memory

nir/lower_io_to_vector: allow FS outputs to be vectorized

Rob Clark (60):

freedreno/a6xx: remove some left over dead code

freedreno/ir3: allow copy-propagate out of fanout

freedreno/ir3: treat high vs low reg as conversion

freedreno/ir3: make high regs easier to see in IR dumps

freedreno/ir3: fixup register footprint to account for prefetch

freedreno/ir3: don’t DCE ij_pix if used for pre-fs-texture-fetch

freedreno/a6xx: do streamout only in binning pass

freedreno/a6xx: don’t tile things that are too small

freedreno/ir3: allow copy propagation for relative

freedreno/ir3: assert that only single address

freedreno/ir3: do better job of marking convergence points

Robin Murphy (1):

Rohan Garg (3):

panfrost: protect access to shared bo cache and transient pool

panfrost: Jobs must be per context, not per screen

Roland Scheidegger (4):

gallivm: use fallback code for mul_hi with llvm >= 7.0

Roman Stratiienko (1):

Sagar Ghuge (26):

intel/isl: Allow stencil buffer to support compression on Gen12+

iris: Resolve stencil resource prior to copy or used by CPU

iris: Get correct resource aux usage for copy

intel/blorp: Use isl_aux_usage_has_mcs instead of comparing

iris: Initialize CCS to fast clear while using with MCS

intel/compiler: Refactor disassembly of sources in 3src instruction

intel/compiler: Don’t move immediate in register

intel/compiler: Set bits according to source file

intel/compiler: Add Immediate support for 3 source instruction

intel: Add missing entry for brw_nir_lower_alpha_to_coverage in Makefile

Samuel Iglesias Gonsálvez (26):

docs/relnotes: add support for VK_KHR_shader_float_controls on Intel

i965/fs: add support for shader float control to remove_extra_rounding_modes()

i965/fs: set rounding mode when emitting nir_op_f2f32 or nir_op_f2f16

i965/fs: set rounding mode when emitting fadd, fmul and ffma instructions

i965/fs/generator: add new opcode to set float controls modes in control register

i965/fs/generator: refactor rounding mode helper in preparation for float controls

intel/nir: do not apply the fsin and fcos trig workarounds for consts

nir: fix denorm flush-to-zero in sqrt’s lowering at nir_lower_double_ops

nir/constant_expressions: mind rounding mode converting from float to float16 destinations

nir/opcodes: make sure f2f16_rtz and f2f16_rtne behavior is not overriden by the float controls execution mode

nir: mind rounding mode on fadd, fsub, fmul and fma opcodes

nir: add support for round to zero rounding mode to nir_op_f2f32

util: add fp64 -> fp32 conversion support for RTNE and RTZ rounding modes

util: add float to float16 conversions with RTZ and RTNE

util: add softfloat functions to operate with doubles and floats

nir: add support for flushing to zero denorm constants

nir: add auxiliary functions to detect if a mode is enabled

spirv/nir: keep track of SPV_KHR_float_controls execution modes

Samuel Pitoiset (136):

radv/gfx10: tidy up gfx10_format_table.py

radv/gfx10: hardcode some depth+stencil formats in the format table

radv: allow to enable VK_AMD_shader_ballot only on GFX8+

radv: add a new debug option called RADV_DEBUG=noshaderballot

radv: force enable VK_AMD_shader_ballot for Wolfenstein Youngblood

radv: implement VK_AMD_shader_core_properties2

ac: fix exclusive scans on GFX8-GFX9

ac,radv,radeonsi: remove LLVM 7 support

gitlab-ci: bump LLVM to 8 for meson-vulkan and meson-clover

radv/gfx10: don’t initialize VGT_INSTANCE_STEP_RATE_0

radv/gfx10: do not use NGG with NAVI14

radv: fix getting the index type size for uint8_t

radv: add radv_process_depth_image_layer() helper

radv: add mipmaps support for decompress/resummarize

radv: decompress mipmapped depth/stencil images during transitions

radv: allocate metadata space for mipmapped depth/stencil images

radv: add mipmap support for the TC-compat zrange bug

radv: add mipmap support for the clear depth/stencil values

ac: drop llvm8 from some load/store helpers

ac: add has_clear_state to ac_gpu_info

ac: add has_distributed_tess to ac_gpu_info

ac: add has_dcc_constant_encode to ac_gpu_info

ac: add has_rbplus to ac_gpu_info

ac: add has_load_ctx_reg_pkt to ac_gpu_info

ac: add has_out_of_order_rast to ac_gpu_info

ac: add cpdma_prefetch_writes_memory to ac_gpu_info

ac: add has_gfx9_scissor_bug to ac_gpu_info

ac: add has_tc_compat_zrange_bug to ac_gpu_info

ac: add rbplus_allowed to ac_gpu_info

ac: add has_msaa_sample_loc_bug to ac_gpu_info

ac: add has_ls_vgpr_init_bug to ac_gpu_info

radv: make use of has_ls_vgpr_init_bug

radv/gfx10: compute the LDS size for exporting PrimID for VS

ac: import linear/perspective PS input parameters from radv/radeonsi

ac: drop now useless lookup_interp_param from ABI

radv: gather info about PS inputs in the shader info pass

radv: move lowering PS inputs/outputs at the right place

radv: remove some unused fields from radv_shader_context

radv: remove unused shader_info parameter in ac_compile_llvm_module()

radv: remove useless ac_llvm_util.h include from the WSI code

radv: remove radv_init_llvm_target() helper

radv: replace ac_nir_build_if by ac_build_ifcc

radv: move setting can_discard to ac_fill_shader_info()

radv: keep a pointer to a NIR shader into radv_shader_context

nir: do not assume that the result of fexp2(a) is always an integral

radv/gfx10: always set ballot_mask_bits to 64

radv: merge radv_shader_variant_info into radv_shader_info

radv: move ac_fill_shader_info() to radv_nir_shader_info_pass()

radv: gather clip/cull distances in the shader info pass

radv: gather pointsize in the shader info pass

radv: gather viewport in the shader info pass

radv: gather layer in the shader info pass

radv: gather primitive ID in the shader info pass

radv: calculate the GSVS vertex size in the shader info pass

radv: calculate esgs_itemsize in the shader info pass

radv/gfx10: account for the subpass view for the NGG GS storage

radv/gfx10: make use the output usage mask when exporting NGG GS params

radv/gfx10: determine the number of vertices per primitive for TES

radv: do not pass all compiler options to the shader info pass

radv: fill shader info for all stages in the pipeline

radv: store GFX9 GS state as part of the shader info

radv: store GFX10 NGG state as part of the shader info

radv: store the ESGS ring size as part of gfx10_ngg_info

radv: calculate GFX9 GS and GFX10 NGG states before compiling shader variants

radv/gfx10: declare a LDS symbol for the NGG emit space

radv: fix allocating number of user sgprs if streamout is used

radv/winsys: add support for GS and OA domains

radv/gfx10: add an option to switch from legacy to NGG streamout

radv/gfx10: implement NGG streamout begin/end functions

radv/gfx10: allocate GDS/OA buffer objects for NGG streamout

radv/gfx10: adjust the GS NGG scratch size for streamout

radv/gfx10: unconditionally declare scratch space for NGG streamout without GS

radv/gfx10: adjust the LDS size for VS/TES NGG streamout

radv/gfx10: fix unnecessary LDS overallocation for NGG GS

radv/gfx10: compute the correct buffer size for NGG streamout

radv/gfx10: gather GS output for VS as NGG

radv/gfx10: enable NGG_WAVE_ID_EN for NGG streamout

radv/gfx10: make GDS idle when leaving the IB

radv/gfx10: make sure to wait for idle before clearing GDS

radv/gfx10: implement NGG streamout

radv/gfx10: disable unsupported transform feedback features for NGG

radv: fix writing depth/stencil clear values to image

radv: fix loading 64-bit GS inputs

radv/gfx10: fix VK_KHR_pipeline_executable_properties with NGG GS

radv/gfx10: add radv_device::use_ngg

radv/gfx10: add missing counter buffer to the BO list

radv/gfx10: fix storing/loading NGG stream outputs for VS and TES

radv/gfx10: use the component mask when storing/loading NGG stream outputs

radv/gfx10: fix storing/loading NGG stream outputs for GS

radv/gfx10: fix NGG streamout with triangle strips for VS

radv: rework the slow depthstencil clear to write depth from PS

Revert “radv: disable viewport clamping even if FS doesn’t write Z”

radv: fix build

radv/gfx10: fix the ESGS ring size symbol

radv: enable lower_fmod for the LLVM path

ac/nir: remove unused code for nir_op_{fmod,frem}

radv: implement VK_KHR_shader_clock

drirc: enable vk_x11_override_min_image_count for DOOM

radv: bump minTexelBufferOffsetAlignment to 4

radv: get the device name from radeon_info::name

radv: sync before resetting query pools if timestamps have been written

radv: use a compute shader for copying timestamp query results

radv: fix DCC fast clear code for intensity formats

radv: rename VK_KHR_shader_float16_int8 structs/constants

Revert “radv: do not emit PKT3_CONTEXT_CONTROL with AMDGPU 3.6.0+”

radv: fix DCC fast clear code for intensity formats (correctly)

ac/llvm: add ac_build_canonicalize() helper

ac/llvm: add AC_FLOAT_MODE_ROUND_TO_ZERO

ac/llvm: force fneg/fabs to flush denorms to zero if requested

radv: implement VK_KHR_shader_float_controls

radv: enable VK_KHR_shader_float_controls on GFX6-GFX7

radv: do not print useless descriptors info in hang reports

radv: print which ring is dumped in hang reports

radv: dump trace files earlier if a GPU hang is detected

radv: do not dump descriptors twice in hang reports

radv: advertise VK_KHR_spirv_1_4

ac/llvm: fix ac_to_integer_type() for 32-bit const addr space pointers

radv: fix updating bound fast ds clear values with different aspects

radv: do not create meta pipelines with 16 samples

radv: add an assertion in radv_gfx10_compute_bin_size()

radv: do not emit rbplus if attachments are undefined

radv/gfx10: re-enable fast depth/stencil clears with separate aspects

radv/gfx10: fix 3D images

radv: fix vkUpdateDescriptorSets with inline uniform blocks

radv: fix a performance regression with graphics depth/stencil clears

radv: compute the number of records correctly for vertex buffers

radv: fix VK_KHR_shader_float_controls dependency on GFX6-7

radv: enable fast depth/stencil clears with separate aspects on GFX8

radv: fix OpQuantizeToF16 for NaN on GFX6-7

radv: fix dumping SPIR-V into hang reports

radv: move nomemorycache debug option at the right palce

radv: fix perftest options

radv: fix compute pipeline keys when optimizations are disabled

radv: fix enabling sample shading with SampleID/SamplePosition

radv/gfx10: fix implementation of exclusive scans