A Lesson in Experimentation...

Let’s face it, many people think that in order to build a high speed transmission line, the best high speed pcb materials have to be chosen, the channel must be shoved into a Full Wave 3D simulator to be engineered correctly, tight impedance control is a must, PCB fabrication tolerances have to be +/- 1mil of gerber data, yadiyadayada...

This isn’t a bad thing considering it is absolutely true that in order to build a typical robust "high speed" channel, careful precautions must be taken e.g. simulations and channel performance tolerance analysis. Yet, one thing I have heavily noticed over my few years of being in the industry is that people are afraid to get out of their comfort zone, challenge their knowledge, & get their hands dirty by playing around in the lab.

How It All Started

One day at my local grocery store this past week, I slammed a pack of my go-to sandwich cheese into my shopping cart; pepper jack, of course. A thought popped into my mind:

“Surely I can make a transmission line out of this sliced cheese. It’s fairly thin, probably enough to avoid non-TEM modal behavior; it's square & flat, and I bet all I would need is some copper tape, an edge mounted coaxial connector or two, & a good ol' fashion VNA to measure it! This will work! "

Preparing the Specimen

To make things easier on myself, I placed a slice of cheese in my food dehydrator on a low setting for 24 hours, checking on it about every few hours. This way I could have a solid slice with less moisture content. I'd like to point out that I had to dab the cheese with paper towels many times to get the grease off; I had no real idea just how much fat there was in this stuff. Reading a label is one thing, but actually seeing it is another!

Saturday morning came, and the experiment was ready to go. The cheese was almost completely dry and rock solid. It measured right at almost 3.18 inches long. I grabbed some 1 oz. copper tape, made a plane on the bottom and then a ~150 mil wide strip on top (scissors and my hands were used so it wasn't exactly uniform). I wanted to get a THRU response, but unfortunately I could only round up 1 measly little edge mounted SMA connector from a scrap pile. But, with the right tools and conditions, I knew I could characterize this T-Line to a good degree with my favorite de-embedding software, AtaiTec ISD. The ol' saying of "when life gives you lemons, make lemonade" definitely held true here. The picture at the top of this article shows the specimen ready for reflection testing.

Extracted Data

S-Parameter data was gathered & a 2-port model was extracted, shown above being referenced to 50Ohms. TDR plots showed the x-sectional Zo being near 52Ohm on average after the launch and before series resistance took over. This was especially surprising since the "stackup" and the T-Line geometry was slapped together on the spot. All I had in my brain to go on was the 2:1 rule for microstrips and it did well. All in all, The data was rather impressive considering the circumstances but no where near perfect. To list some key flaws in this "cheesy" experiment:

My soldering job & overall x-section at the SMA launch was less than ideal. This created an absolutely enormous amount of reflection issues past ~8GHz by itself (after applying time-domain gating you can see this). Mix that in with more reflection points and you get the data above! It definitely wasn't high quality.

The de-embedding job was done quickly and on 1x Open Conditions with some other wrenches throw in i.e . there were anomalies with the model. A short might have been a better choice and the launch definitely should have been more controlled. Bottom Line: Not all rules were followed and assumptions were made.

. there were anomalies with the model. A short might have been a better choice and the launch definitely should have been more controlled. Bottom Line: Not all rules were followed and assumptions were made. The transmission line itself was far from uniform and ideal. Remember that this isn't a fab house with temperature controlled pressing machines with tons of automation. This is cheese containing scattered pepper bits with adhesive copper tape on it that could barely stick! This even introduced periodic loading effects that were apparent! This guy had all kinds of problems with it.

containing scattered pepper bits with adhesive copper tape on it that could barely stick! This even introduced periodic loading effects that were apparent! This guy had all kinds of problems with it. The list could go on for quite a while...

But, let's ask ourselves a few questions. Do we care about it not being "ideal"? What we are trying to do here? What is the objective here? Answer: There is no objective! Sure, we have a general idea but we really have no end goal other than to see what we get. Eric Bogatin introduced me to a great quote once:

You can observe a lot just by watching.

-Yogi Berra

There are so many things that can be learned in this silly little experiment. Let's dig into this cheesy T-Line and learn a thing or two about it. I will cover three different eye openers that made me excited. I'll even share some cool tricks too!

Can We Get a Cleaner Insertion Loss Profile?

One of the first things I noticed was the insertion loss profile showed all kinds of issues other than pure attenuation from material properties. If you were an employee at a place such as NIST and tried to pass this off as the attenuation of a line, you would most likely be fired or at least have a long talk with your manager.

What if all I needed was a decent answer as to what the attenuation of the line is? How in the world could I get this information from this junk data?! I learned a great technique once from the book Handbook of Microwave Component Measurements: with Advanced VNA Techniques. FYI, Joel Dunsmore from Keysight is the author of this awesome text. He and other great engineers are pretty active on the network analyzer forums on their website and if you ever need to discuss problems or ideas related to VNA measurements, I would go there. Now, on to the technique.

Conservation of Energy

It is common knowledge in the world of S-Parameters that the following holds true for a lossless 2-port network:

and therefore,

How is this useful to this situation? Nothing in real life is ever lossless! True. But think about it. Look up the analytical equations for the attenuation of a coaxial line that have been proven time and time again. Then think of a 3.5mm SMA coaxial connector and put in the numbers. From a practical perspective of large and "long" channels in the microwave band (before non-TEM moding takes place), a coaxial connector has almost no intrinsic material loss. Hence, coaxial connectors in most SI applications are virtually invisible in terms of intrinsic loss. Let's use this to our advantage.

If we can somehow capture the return loss of just the connector itself, by assuming no intrinsic material losses, we can determine the loss of the connector caused by it's reflections! This is where time domain gating becomes your friend. We can band-pass gate the launches (connectors and/or port discontinuities) on both ends and effectively gather the IL of the launches. Next, we carefully band-pass gate the THRU IL response before re-reflections occur to get the main lobe of the distorted pulse response. Finally, by compensating for our losses from the launches by mathematical division, we can achieve...

*drum roll*

Not too shabby! Almost like magic we have unveiled the true attenuation of the line to a good degree. This technique, when used correctly can do wonders and I suggest tucking this one away deep in your noggin. Let's move on the the next observation.

Can We Somehow Extract Dk?

Did you notice something interesting about that insertion loss plot above? Look again before reading on. Recall that resistive losses are proportional to the square root of frequency and that dielectric losses are proportional to frequency. The cheese transmission line looks almost completely resistive. But it's out to 20GHz! How could that be? It's... CHEESE! At this point the light bulb came on.

Substrate Height is 65mils Conductor width was around 150mils Average x-sectional Z0 was 52Ohm 50Ohm Microstrip with FR4 follows 2:1 Rule (We are above that) The intrinsic loss of the T-Line looked almost completely resistive

Could it be? The cheese is actually a good dielectric?! But... it's... CHEESE!!! The answer is blatantly obvious but let's get some numbers.

Building a Synthetic Resonator

If you've never heard of the Beatty standard, take the time to research it. It is an excellent resonator that allows for great extraction of material & geometric properties of a T-Line, typically stripline. This is one of the most favored ways of extracting values such as substrate Dk and Df along with etching factors from fabrication. In general, almost any resonator can be useful for extraction because they are so predictable and their properties smack you in the face when looking at s-parameter plots. But what if you don't have a Beatty standard? What if all you have is either a normal thru or even worse... an open/short?

What now?

Recall that S-Parameters have a reference impedance. You can think of this as the impedance at a port. Recall that the impedance of an open is ideally infinite and the impedance of a short is ideally zero. Finally, recall that a good resonator is basically a pair of strong discontinuties where the frequency of that resonator is 100% related to the distance in time (or space) of the pair. Bingo.

If you don't have a Beatty standard and you want a good & fast effective Dk measurement all you need to do is:

Know the length of the DUT Change the reference impedance of the S-Parameter to an extraordinarily high value if open condition. If short condition, set to an extraordinarily low value. If thru condition, either will suffice as long as both port impedances are the same.

Congratulations! You have just created a synthetic resonator in S-Parameter Land. Let's see how it looks.

Now you may be asking, "Why does the open need high, the short low, and the thru either or?" The best advice I can give you is to draw the scenario out on a bounce diagram. I'll leave you with this as a homework assignment. To be honest, it doesn't matter whether high or low is chosen. What matters is the polarities of the elements in the strong discontinuity pair and having that knowledge. When you use the method above (same polarity pair), you use the first null frequency point to get the effective Dk. Let's do the cheese example.

My first null point was at 1.21 GHz. Now what? We can apply a simple formula to get the effective Dk.

In this case, Dk_effective was 2.35. Remember that this was a microstrip so the fringe fields in the air bring the effective Dk to a lower level. Let's use a solver to back track and grab the Dk value of the cheese itself. I input my stack up & geometric properties, then tuned the Dk value until the effective Dk field matched measurement results.

Eureka! ~2.86 as the Dk of the Cheese! And look! The impedance came out as 53.5Ohm which was really close to measurement! Not to mention, this would explain the IL curves looking mostly resistive! Recall that there is a strong relationship between low Dk values and low Df values. I'll leave trying to fit values for 1:1 correlation sometime later. For now this explains so much and is, quite frankly, unbelievable! The cheese actually acts like a good dielectric. Who would have thought?

Can it pass a 28Gbps Signal?

Right now, 25Gbps & 28Gbps NRZ over a single differential lane is all the rage right now (not to mention 56Gbps PAM-4 & in some communities 56Gbps Duobinary). I decided to put the Cheesy T-Line to the test one last time. Let's use the extracted model from de-embedding, shove a 10ps 28Gbps PRBS9 1V signal through it (simulation), and look at the all seeing eye. Let's not get into a discussion about mark/transition density or run length or Gibb's phenomenon. Let's just sit back and enjoy the results.

Eye Diagrams

Here's the input eye:

Here's the output eye with no equalization:

Here's the output eye with a passive CTLE & 3-Tap FFE:

Hell, why not do PAM-4 for fun? unEQ'd:

Here's PAM-4 with EQ applied:

All of them look pretty beautiful, even the nasty unEQ'd PAM-4 (in multilevel signaling, overshoot and undershoot is crucial to control).

Channel Operating Margin

Just for fun let's run a Channel Operating Margin (COM) analysis from the IEEE 802.3bj specification and let's see what we get.

This made me almost fall out of my chair. Of course this would never work in a real 25Gbps system but it is funny to see that this cheesy T-Line can pass the spec. :) Remember, material choice and length along with all the other problems in the SI world determine how fast we can go. So yes, it goes without saying:

You can pass a 28Gbps Signal over a Microstrip made with pepper jack cheese as the dielectric substrate in the right place at the right time

Closing Statements

I believe it's time to wrap this show up. We've learned a lot here in this silly yet fun & fulfilling experiment. I hope this reinforces the idea that you can observe a lot just by watching. I hope this also makes you wonder what exactly is in sandwich cheese slices aka "cheese food". Recall typical plastics have Dk values in the low 2's... All jokes aside, always remember to study hard and experiment every once in while. Don't be afraid to get your hands dirty and try new things. Just because it isn't the norm, doesn't mean it can't be done.

Please check out my website www.asic.community for free signal integrity lectures and presentations. The material selection is low right now but as time ticks, more will come.

Best of luck to you all.