



The first Intel Tiger Lake processors to ship with Gen12 graphics (Xe) are scheduled to arrive in 2020/2021, and we’re now hearing a bit more about the architecture that will be underpinning them. Last week, Intel released a new set of Linux patches that describe a new Display State Buffer (DSB) engine, which is said to handle batch submit display register programming.

According to the documentation provided with the patch, DSB is described as “[reducing] loading time and CPU activity, thereby making the context switch faster. DSB Support added from Gen12 Intel graphics based platform.” In other words, the CPU is going to be tasked less, leaving its precious resources available for other operations.

Intel has also referenced Gen12 and architecture in a new merge request in GitHub. The shift to Gen12 is described by Intel as providing “the most in-depth” EU ISA remake since the i965 debuted over a decade ago.





“The encoding of almost every instruction field, hardware opcode and register type needs to be updated in this merge request,” writes Francisco Jerez, who works on Intel’s open-source Linux graphics team. “But probably the most invasive change is the removal of the register scoreboard logic from the hardware, which means that the EU will no longer guarantee data coherency between register reads and writes, and will require the compiler to synchronize dependent instructions anytime there is a potential data hazard.”

You can read up more on the merge request over at GitHub.

Gen12 will be represent the first implementation of Intel’s Xe graphics architecture, and the company’s first full-fledged discrete graphics card using Xe is expected to be available in 2020 as well. We’ve already seen some impressive performance gains with Intel’s Gen11 graphics in its currently shipping Ice Lake-based 10nm processors, and the Gen12 graphics in 10nm Tiger Lake are expected drive that performance even higher.

Based on information that Intel already provided to us, Tiger Lake will offer a 2x uplift in performance compared to the Gen11 graphics in Ice Lake. Given that the Gen11 IGP is already offering comparable performance to Vega-based GPUs in Ryzen 3000 APUs (although trailing a bit in gaming performance), Tiger Lake should be firmly ahead. However, AMD could easily turn the tables with 7nm Ryzen APUs with integrated Navi graphics.

Tiger Lake will not only feature Gen12 graphics, but it will also include another CPU Core architectural revamp along with new I/O technology (i.e. PCIe 4.0, which was first introduced during the AMD Ryzen 3000/X570 desktop launch).