Sega Model 1 Manufacturer: Sega Release Date RRP Code 1992-08 ¥? [1] 837-8886171 1992 [2] £6,000 837-8886171 1992 ? 837-8886171

























































The Sega Model 1 is an arcade system board that was released by Sega in 1992. It is the successor to the Sega System 32 (released in 1990). While earlier Sega hardware was capable of handling 3D polygons (such as the Mega Drive, released in 1988), the Model 1 was Sega's first hardware specifically designed for 3D polygon graphics.

Originally, the Model 1 was simply known as the CG Board, but was retroactively given the Model 1 name after work on the Model 2 began. The Model 1 was succeeded by the Sega Model 2 (released in 1993). Both the Model 1 and Model 2 were eventually succeeded by the Sega Model 3.

Hardware

The Model 1 board took three years to develop[3], with Yu Suzuki's Sega AM2 team involved in its development from the drawing board.[4] It was intended to compete with Namco's System 21; Namco was then the market leader in polygonal 3D video games, with titles such as Galaxian³ and Starblade.[5] The Model 1 was eventually released in 1992, debuting with Virtua Racing. While it was a significant improvement over the System 21, the Model 1 hardware was expensive, and only a few games were developed for the platform.

“ Dedicated 3D processors didn’t exist yet, and so I had to manually write a 3D graphics engine that would compress and process things faster. Just using assembly language. Now, of course, everyone writes in C++, but back then there was no other choice than machine code, otherwise we wouldn't be able to make everything fast enough. „ — Yu Suzuki [6]

Unlike the Model 2, Lockheed Martin was not involved with the development of the Model 1, but it was developed internally at Sega, before Lockheed Martin became involved with the development of the Sega Model 2, according to former Lockheed Martin employee, Real3D's Jon Lenyo, in 1998.[7]

Like the Model 2, Fujitsu was involved with the development of the Model 1. They provided the DSP coprocesors, which were modified by Sega with custom microcode for hardware T&L capabilities;[8] hardware T&L would not appear on consumer home systems for many years. Fujitsu also provided several other components, including the tilemap generator chip, the DMA controllers, and several memory chips.

The Model 1 also had support for the Sega VR headset. It was used for only one known Model 1 game, Dennou Senki Net Merc. It is unknown whether Model 1 hardware was used for the VR-1.

The hardware was designed to cope with 180,000 polygons per second[3].

Technical specifications

Technical specifications for Sega Model 1 hardware:[1]

Sound

Audio capabilities: 28 PCM channels per chip (one for music, one for sound effects), 56 PCM channels total

Sound timer: Yamaha YM3834 @ 8 MHz

Graphics

Graphical capabilities of the Sega Model 1:[13]

Memory

Memory: Up to 39,166 KB (7008 KB main, 23,646 KB video, 8512 KB audio)

System RAM: 2776 KB (1896 KB high‑speed SRAM) Main RAM: 480 KB (at least 156 KB SRAM) Main Board: 324 KB (320 KB main, 4 KB comm)

Comm Board: 12 KB SRAM (8 KB SRAM, 4 KB Dual‑Port SRAM) [28] [29]

Other boards: 144 KB SRAM (128 KB Memory Board, 8 KB I/O Board, 8 KB Motor Board) VRAM: 2232 KB (at least 1464 KB SRAM) Main Board: 768 KB (128 KB display lists, 576 KB tiles, 64 KB color)

Video Board: 1464 KB SRAM (1024 KB framebuffers) Audio RAM: 64 KB (16 KB SRAM) Internal DSP cache: 30 KB (6 KB per DSP) [15]

System ROM: 1 MB EPROM (768 KB Memory Board, 64 KB I/O Board, 64 KB Motor Board, 128 KB Comm Board)

Game ROM: Up to 35,336 KB (5504 KB main EPROM/MROM, 21,384 KB video MROM,[30] 8.25 MB audio MROM)[31]

Bandwidth

System RAM bandwidth: 664.224 MB/s Main RAM: 76 MB/s V60: 64 MB/s (32‑bit, 16 MHz) [32]

Z80: 12 MB/s (3× 8‑bit, 4 MHz) [33][34][29] VRAM: 568.223776 MB/s DSP: 320 MB/s (5× 32‑bit, 16 MHz) [32]

Video Board: 248.223776 MB/s (112-bit) 315‑5422 & 315‑5292: 30.769232 MB/s (32‑bit, 7.692308 MHz, tilemaps) [35]

315‑5423: 72 MB/s (16‑bit, 36 MHz) [32]

315‑5424 & 315‑5425: 145.454544 MB/s (64‑bit, 18.181818 MHz, framebuffers) [36] Audio RAM: 20 MB/s (16‑bit, 10 MHz) [33] Internal processor bandwidth: 384 MB/s V60: 64 MB/s (32‑bit, 16 MHz)

DSP cache: 320 MB/s (5× 32‑bit, 16 MHz) System ROM bandwidth: 64 MB/s (32‑bit, 16 MHz) [37]

Game ROM bandwidth: 211 MB/s (3× 32‑bit) EPROM: 64 MB/s (32‑bit, 16 MHz) [37]

MROM: 147 MB/s (2× 32‑bit, 20 MHz & 16.666667 MHz, 50/60 ns) [38][39]

List of games

Magazine articles

Photo gallery

Unit

Amplifier PCB

Communication PCB

CPU

Input/Output PCB

Sound PCB

Video PCB

Notes

↑ [16] 5 instructions per cycle[16]] [5 instructions per cycle5 instructions per cycle ↑ [16] MAC (multiply–accumulate) operation (multiply and add) per cycle ↑ [16] 1 operation per cycle (2 cycles per MAC operation, 2 cycles per divide)[16]] [1 operation per cycle (2 cycles per MAC operation, 2 cycles per divide)1 operation per cycle (2 cycles per MAC operation, 2 cycles per divide) ↑ [1024 KB, 512 KB per framebuffer, 2 bytes per pixel 1024 KB, 512 KB per framebuffer, 2 bytes per pixel] ↑ [144 MB/sec framebuffer bandwidth, double-buffered, 16-bit color 144 MB/sec framebuffer bandwidth, double-buffered, 16-bit color] ↑ [13] 44 cycles (20 MAC operations, 2 divides) per vertex[13]] [44 cycles (20 MAC operations, 2 divides) per vertex44 cycles (20 MAC operations, 2 divides) per vertex ↑ [4 vertices per quad polygon 4 vertices per quad polygon] ↑ [13] 194 cycles (89 MAC operations, 8 divides) per quad polygon[13]] [194 cycles (89 MAC operations, 8 divides) per quad polygon194 cycles (89 MAC operations, 8 divides) per quad polygon ↑ [13] 206 cycles (95 MAC operations, 8 divides) per quad polygon[13]] [206 cycles (95 MAC operations, 8 divides) per quad polygon206 cycles (95 MAC operations, 8 divides) per quad polygon ↑ [20][21] 230 cycles (107 MAC operations, 8 divides) per quad polygon[20][21]] [230 cycles (107 MAC operations, 8 divides) per quad polygon230 cycles (107 MAC operations, 8 divides) per quad polygon ↑ (309 geometry cycles, 40 RAM cycles, 39 raster operations) 400 cycles per 4-scanline polygon (3 operations/scanline per polygon),[23][24] 496 cycles per 32-pixel polygon (3 cycles per pixel) 388 cycles (309 geometry cycles, 40 RAM cycles, 39 raster operations) 400 cycles per 4-scanline polygon (3 operations/scanline per polygon),[23][24] 496 cycles per 32-pixel polygon (3 cycles per pixel)] [388 cycles400 cycles per 4-scanline polygon (3 operations/scanline per polygon),496 cycles per 32-pixel polygon (3 cycles per pixel) 388 cycles400 cycles per 4-scanline polygon (3 operations/scanline per polygon),496 cycles per 32-pixel polygon (3 cycles per pixel)] ↑ Flat shading: 332 cycles per 32-pixel polygon (194 geometry cycles, 40 RAM cycles, 34 raster operations, [25] 2 cycles per pixel) [26]

2 cycles per pixel) Texture mapping: 128 cycles per 32-texel texture: 2 block moves, 2 cycles per texel (2 bytes per texel)

Texture mapping: 112 divide cycles per 32-texel polygon: 56 divides per 32-texel polygon, 24 vertex divide cycles per polygon (12 divides per polygon), 64 texel divide cycles per 32-texel polygon (32 divides, 1 divide per texel) [27] 572 cycles (332 cycles flat shading, 240 cycles texture mapping) per 32-texel polygon

572 cycles (332 cycles flat shading, 240 cycles texture mapping) per 32-texel polygon Flat shading: 332 cycles per 32-pixel polygon (194 geometry cycles, 40 RAM cycles, 34 raster operations, [25] 2 cycles per pixel) [26]

2 cycles per pixel) Texture mapping: 128 cycles per 32-texel texture: 2 block moves, 2 cycles per texel (2 bytes per texel)

Texture mapping: 112 divide cycles per 32-texel polygon: 56 divides per 32-texel polygon, 24 vertex divide cycles per polygon (12 divides per polygon), 64 texel divide cycles per 32-texel polygon (32 divides, 1 divide per texel)[27]] [572 cycles (332 cycles flat shading, 240 cycles texture mapping) per 32-texel polygon ↑ Gouraud shading: 388 cycles per 32-pixel polygon

Texture mapping: 240 cycles per 32-texel polygon 628 cycles per 32-texel polygon

Gouraud shading: 388 cycles per 32-pixel polygon

Texture mapping: 240 cycles per 32-texel polygon] [628 cycles per 32-texel polygon