Intel patents chip-to-chip optoelectronic bridge



In September, Intel was granted a patent for extending the silicon bridge technique to include optical interconnects. Titled Chip-to-Chip Interconnect with Embedded Electro-Optical Bridge Structures, three people, Zhichao Zhang, Kemal Aygun, and Robert L. Sankman, are listed as the inventors, with Aygun and Sankman both being associated with EMIB according to a



Why would Intel be interested in an optical bridge between chips? For one, as the patent notes, optical bridges may increase chip-to-chip interconnect signaling bandwidths — e.g., by 1-2 orders of magnitude This isn't just a luxury, but a necessity, however; chip-to-chip bandwidth requirements have been increasing at an exponential rate, doubling every few years for a decade or two now, especially for graphics processors. Source: NVidia The architecture The basic construction is pretty general and doesn't give away much about Intel's implementation in an actual package. Shown below, the system consists of two all-electrical integrated circuit (IC) chips, (320 and 325) adhered to the bridge chip (310). The bridge is made up of a special type of silicon called Communication between the two IC's happens through the following process: Electrical signal from IC #1 (320) arrives on the bridge through electrical contacts (330) Electrical contacts drive an electro-optical converter such as an on-chip laser + modulator (332) Modulated light travels down a waveguide (334) Light is detected and turned back into an electrical signal with a photodiode (336) Electrical signal arrives at IC #2 (325) through electrical contacts on the bridge (338) The disclosure goes to describe applications in general computing devices, with data links being no more than about 10cm. Fundamentally, this technology would be limited by the size of the SOI wafers (30cm) Other thoughts On its face, this invention is similar to the TeraPHY chip from Bay Area startup



Overall, it's an intriguing patent, but its vagueness indicates adoption is still several years out. High end data center compute chips will probably be the first to use it.



A copy of the patent can be found "Heterogeneous computing", where computer chips are themselves comprised of a mishmash of different "chiplet" units, is an increasingly popular design style, with notable recent examples being phone processors and AMD's pioneering Zen microarchitecture . Physically, this architecture is enabled by an alphabet soup of different solutions created by silicon manufacturers, such as TSMC's integrated fan-out (InFO) and Intel's embedded multi-die interconnect bridge (EMIB). The most advanced of these packaging technologies allows for chiplets to sit on top of, and be connected through, a single piece of "bridge" silicon that contains tiny metal lines — far smaller than those in traditional printed circuit board (PCB) technology.In September, Intel was granted a patent for extending the silicon bridge technique to include optical interconnects. Titled, three people, Zhichao Zhang, Kemal Aygun, and Robert L. Sankman, are listed as the inventors, with Aygun and Sankman both being associated with EMIB according to a conference publication on the subject.Why would Intel be interested in an optical bridge between chips? For one, as the patent notes, optical bridgesThis isn't just a luxury, but a necessity, however; chip-to-chip bandwidth requirements have been increasing at an exponential rate, doubling every few years for a decade or two now, especially for graphics processors.The basic construction is pretty general and doesn't give away much about Intel's implementation in an actual package. Shown below, the system consists of two all-electrical integrated circuit (IC) chips, (320 and 325) adhered to the bridge chip (310). The bridge is made up of a special type of silicon called silicon on insulator (SOI) in which a thin layer of silicon sits over an electrically-insulating oxide of silicon. This special silicon is necessary in photonics because the insulating oxide traps the light so that it may be steered along the wafer surface by making features called waveguides.Communication between the two IC's happens through the following process:The disclosure goes to describe applications in general computing devices, with data links being no more than about 10cm. Fundamentally, this technology would be limited by the size of the SOI wafers (30cm)On its face, this invention is similar to the TeraPHY chip from Bay Area startup Ayar Labs , which offers a high-speed electro-optical in-package chiplet for data communications. However, they differ in that with Intel's solution the in-package chiplet is the bridge itself. They also target different range applications, with Ayar Labs's having a 2km spec and Intel's being centimeters.Overall, it's an intriguing patent, but its vagueness indicates adoption is still several years out. High end data center compute chips will probably be the first to use it.A copy of the patent can be found here