One of the most tantalizing next-generation technologies that could dramatically reduce system power consumption and improve bandwidth is silicon photonics. This method of chip-to-chip communication uses silicon as an optical medium, and transmits data incredibly quickly with far better power consumption and thermals than traditional copper wires. Now, IBM is claiming to have advanced the technology a significant step by integrating a silicon photonic chip on the same package as a CPU.

To-date, silicon photonics has been a major research area for HPC and exascale computing operations, where the technology is seen as essential for the long-term progress of supercomputing.

As this chart shows, hitting one exaflop (a goal DARPA head Bob Colwell thinks is unlikely in any case) will require far more bandwidth and much higher efficiency. We need photonic links that can offer orders of magnitude more connectivity at 1 mW per gigabit of bandwidth and at a cost of 2.5 cents per gigabit as compared to $10 today.

This diagram shows the current state of silicon photonics technology, with the connector integrated at the board edge. IBM’s new research has managed to shift the silicon photonics array to the CPU package, but has not yet integrated it with the CPU itself.

One of the major obstacles to building silicon photonics on-package has been adapting the waveguides to chip packaging technology. Current silicon photonics put the equipment and transceivers at the edge of the board, but don’t route wires through the package. In order to build the waveguides on-package, IBM had to develop a method of connecting the silicon waveguides to polymer waveguides, despite their vastly different sizes. This was achieved by slowly tapering the silicon waveguides and precisely aligning the two parts.

What about consumer hardware?

The idea of personal computers that run on light (or transfer data with it) is decades old, but there’s no sign we’ll see consumer variations of this technology any time soon. The reason silicon optics is being researched at the exascale level is because HPC applications have bandwidth and power consumption requirements that copper wire literally can’t deliver — and the organizations that need exascale computing can afford to cover the development costs.

I do think silicon photonics will go mainstream, but it’s not going to happen overnight. Intel will likely wait until it can build the equipment on-package, at the very least, and there’s still the question of how silicon photonics will integrate with 3D chip stacking. I’d guess we’re at least five years from mainstream adoption and 7-10 years before the technology becomes widespread.