SK Hynix unveiled its future roadmap of new flash products here at the Flash Memory Summit. But in a case of the marketing department straying too far from reality, the company has branded the new flash as "4D NAND." That implies a new dimension added to the garden-variety 3D flash, but it looks eerily similar to a technology pioneered by Intel and Micron, albeit with a few other existing flash technologies sprinkled in.

Image 1 of 3 Image 2 of 3 Image 3 of 3

SK Hynix's new 4D NAND uses a charge trap design, just like the flash produced by Samsung and WD/Toshiba. SK Hynix has used Charge Trap Flash (CTF) designs for several years, so it isn't new, and currently Micron and Intel are the only two flash-fabbers using floating gate technology. Intel and Micron plan to diverge on their flash development efforts after their next-gen flash comes to market, after which Micron will use its own 'Replacement Gate' technology, which is simply a re-branded Charge Trap Flash design. In other words, Intel will soon be the only flash producer using floating gate technology.

Image 1 of 2 Image 2 of 2

So what separates SK Hynix's 4D NAND from the 3D NAND competitors? The company touts its CTF design paired with its Periphery Under Cell (PUC) technology. In short, 3D flash consists of two primary components: the array and the periphery circuitry. Just like every other 3D NAND, SK Hynix's array is a vertical stack of layers that stores data, and the periphery circuitry lines the edges of the die. This circuitry controls the array, but it consumes die space and increases in complexity and size as more NAND layers are added. That added complexity and size increases the cost of the end product.

To circumvent this issue, SK Hynix's 4D NAND uses the PUC design, which places the circuitry under the array instead of around it. This tactic increases density, and thus reduces cost. However, this is the same design that Intel and Micron pioneered with their very first generation of 3D flash, though they refer to it as "CMOS under Array" (CuA). Samsung has also announced that it's moving to a CuA-type design in the future, so this tactic is definitely not new.

As such, SK Hynix's rebranding of existing technologies certainly does not take NAND into the fourth dimension. While we've yet to see how this new NAND will perform, 4D NAND as a technology brand seems to mostly be marketing gone wild.

Image 1 of 6 Image 2 of 6 Image 3 of 6 Image 4 of 6 Image 5 of 6 Image 6 of 6

All that aside, SK Hynix does have an impressive-looking roadmap. The company will sample its first-gen 4D NAND in Q4 2018. The 96-layer TLC flash will come as standard 1Tb die for SSDs and a 512Gb die for BGA packages. The company also has QLC 4D NAND in development. This variant of the 96-layer flash will come to market in the second half of 2019, which is well behind the other flash-fabbers that are either shipping QLC products or have them coming to market this year.

SK Hynix sees a path forward to 500-layer 4D NAND, but hasn't specified a timeline for the product.