Japanese company Unisantis, founded in 2004 to develop and commercialize a new type of transistor, has announced a 24-month collaborative research agreement with Sinapore's Institute of Microelectronics (IME) to work on the device. Unisantis is making some huge claims about this new transistor, a three-dimensional design called the Stacked Gate Transistor (SGT) that the company claims could boost processor clockspeeds north of 20GHz to a possible 50GHz.

I'm not enough of a semiconductor device physics guy to be able to give the level of scrutiny that I'd like to the 20GHz+ claims, but it is clear that man behind the SGT, Fujio Masuoka, is a heavyweight in the semicoductor memory world. Indeed, most of the journal articles that I was able to dig up on the SGT were related to the device's potential for the flash storage market, where its 3D structure—source, gate, and drain are arranged vertically, instead of spread out horizontally—makes for a fast, high-density nonvolatile memory cell.

Unisantis clearly has ambitions for the SGT that extend well beyond the memory market, however. The company is touting the device as an eventual successor to the standard planar transistor design, a design whose well-known clockspeed scaling problems have put the brakes on the clockspeed race and have forced the entire computer industry into the parallel computing paradigm that programmers are still struggling with.

If the SGT is able to get the per-thread performance train rolling again, then this would shift some of the burden of providing overall software performance increases off of programmers and back onto process engineers. However, the SGT is an unspecified length of time away from commercialization, and, by the time it gets here, it's possible that most programmers will be grappling with core counts well north of 10 cores per die (i.e., a Nehalem successor that has moved down into the mainstream). So whatever relief the SGT may eventually provide is almost too far off to matter in terms of slowing down the multicore revolution.





Bird's eye view of the Tri-Control Gate Surrounding Gate

Transistor

(TCG-SGT) Nonvolatile memory cell.

Image source: Bird's eye view of the Tri-Control Gate Surrounding GateTransistor(TCG-SGT) Nonvolatile memory cell.Image source: Science Direct (subscription)

If you know more about the SGT and can point me to some good resources for reading up on it, be sure to drop into the discussion thread and/or send me an e-mail. In spite of the fact that the basic idea for this device structure has apparently been around for at least 20 years, today's announcement was my first exposure to it. So I'll definitely be keeping an eye on it by opening up a new "SGT" entry in the "three to five years away" file.