Posted on by storagedepotuk

The Floppy Disk Controller (FDC) is a device that controls internal 3.5/5.25 inch floppy disk drive devices on desktop x86 systems. There are a range of chips that have been produced for this function which include: 8272A, 82078, 82077SL & 82077AA.

Each ribbon cable for floppy drives can hold up 2 drives. One floppy controller chip can control 2 floppy cables, for a total of 4 drives. It is theoretically possible for a system to have more than one controller chip, but you will not find any existing systems with more than one. If a system were to have more than one floppy controller, the second controller would be found at a base IO port address of 0x370.

The floppy controller is programmed through 9 registers, which can be accessed through IO ports 0x3F0 through 0x3F7 (excluding 0x3F6). As usual on the PC architecture, some of those IO ports access different controller registers depending on whether you read from or write to them. Use standard “outb” and “inb” commands to access the registers.

All commands, parameter information, result codes, and disk data transfers go through the FIFO port. MSR contains the “busy” bit flags that must be checked before reading/writing each byte through the FIFO. DOR controls the floppy drive motors, floppy drive “selection”, and resets.

The FDC has three I/O ports. These are:

Data port

Main status register (MSR)

Control port

The first two reside inside the FDC IC while the Control port is in the external hardware.

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