In previous design generations interconnect could safely be modeled by extraction using just R and C values. Parasitics in interconnect are important because they can affect the operating frequency or phase error in circuits like VCO’s. The need to model parasitics properly in wires is just as applicable in PA’s, LNA’s and for clock lines, or any other place there is critical interconnect in high speed analog or RF circuits. Several things have changed that are now compelling designers to look more closely at interconnect parasitics. Up until now inductance was something that could be ignored. But with higher frequencies, even simple wires inside circuits are starting to look like transmission lines. The rule of thumb has been that when the length of the signal path was long enough to become some percentage of a wavelength that the line itself starts to become a concern for signal integrity. The question is what is the critical length in designs?

Lets first look at operating frequency to see at what scales we will have to more closely examine interconnect effects. At 900MHz the wavelength in a metal conductor is ~192mm, a very large dimension relative to IC circuit interconnect. One percent of that is a whopping 1923 microns. But if we move up to 12GHz we see that the wavelength is

14.2mm, and one percent of that is 144 microns. Now we see we might actually encounter circuit elements that are around this size.

What is needed are some objective data on what happens when wires are modeled with and without inductance as circuit signal paths exceed two orders of magnitude less than the wavelength.

We have run some test cases using a straight metal line to determine the magnitude of the discrepancy between predicted and actual signal performance that comes from ignoring inductance where the wires are more than one percent of the wavelength. Phase error specs for signal lines are often capped at 1 degree of phase error. The spec for signal amplitude accuracy usually needs to be better than +/-5%.

Here is what we see from simulation using PeakView to generate electromagnetic models for a 200um line running at 25GHz. This line length is 3% of a wavelength.

This is the added impact seen by considering inductance in our analysis. It is evident that even when the line length is just 3% of a wavelength significant effects can show up.

It is recommended that design flows for high speed analog and RF circuits include an accurate EM based method for including inductive effects in circuit performance analysis. PeakView offers this capability in its HFD option. HFD allows for inductive effects to be easily included in circuit simulation runs. No manual work is required and it is fully integrated with the LVS and LPE flow. PeakView is a high performance fullwave electromagnetic solver providing accurate resistance, capacitance and inductance information that is usable by designers for transient circuit simulation.



About Lorentz Solution, Inc.

Lorentz Solution, Inc. is the industry leader in supplying electromagnetic (EM) design capabilities to the RF, high-speed analog and high-speed digital design community. PeakView™ EM Design Platform, Lorentz’s flagship product, is widely adopted by top IDM, fabless companies and semiconductor foundries. Based in Santa Clara, California, USA with initial funding from US-based VC firms, Lorentz Solution is continuing its multi-year profitable growth.

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