By Adam Taylor

Many Digital Processing Systems use FPGAs because the FPGA’s large number of dedicated DSP blocks and block RAMS permit you to parallelize and pipeline algorithms. Consequently, FPGAs are commonly interfaced to high-performance ADCs and DACs such as the e2v EV10AQ190 Low power QUAD 10-bit 1.25 Gsps ADC and the EV12DS130A Low Power 12-bit 3 Gsps DAC with 4/2:1 MUX (which is also space-qualified for GEO missions as the EV10AS180). Often these converters have GHz+ sample rates (link here http://www.e2v.com/products/hi-rel-semiconductor-solutions/broadband-data-converters/). Understanding and using these high-performance devices can present interesting challenges to the engineer teams beyond just the mixed-signal PCB layout.

These e2v Data Converters have wide bandwidth and good performance—most commonly referred to as analogue full power bandwidth on datasheets—even in the high Nyquist zones. (This ability is rare.) Because of this good converter performance, direct up conversion and down conversion can be used, which reduces component count, power supply requirements, and saves money.

At high frequencies, the Nyquist sample rate (two samples per cycle) simply cannot be maintained. An example of this would be using an ADC to sample a 3GHz full-power-bandwidth analog input with a 2.5GHz sample rate. Using Nyquist-rate criteria, signals above 1.25GHz will need to alias back into the first Nyquist zone to be of use. These aliased images are harmonic components of the fundamental signal and thus contain the same information as the non-aliased signal.

Conversely if you are using a DAC, you need to determine which harmonic you wish to use in the upper Nyquist zones if you are going with direct conversion. However, with DACS you need to perform SINC compensation to compensate for the DAC’s attenuation at higher frequencies. It is common therefore, for an ADC or DAC to be optimized to work in one Nyquist zone by carefully selecting input components, baluns, and ac-coupling capacitors and through the design of front-end analog pre filters and so on.

Nyquist zones and Aliasing, showing the images in the 1, 3 and 4 zones for a signal in zone 2, the fundamental (Fa) and the images harmonics or harmonic content.

To determine the resultant frequency location of the harmonic or harmonic content you can use the algorithm below:

Fharm=N ×Ffund

IF (Fharm=Odd Nyquist Zone)

Floc=Fharm Mod Ffund

Else

Floc=Ffund-(Fharm Mod Ffund)

End

where N is the integer for the harmonic of interest.

For example with a sample rate of 2500 MHz and a fundamental of 1807MHz, there will be a harmonic component at 693 MHz within the first Nyquist zone.

Having explained a little about the frequency spectrum, the way you interface these devices to the FPGA is another important factor. Many high-performance data converters use multiplexed digital inputs and outputs that operate at a lower data rate with respect to the converter’s sample rate—typically FS/4 or FS/2 as shown in the diagram below, which shows the converter data streaming over four parallel 10-bit buses (A, B, C, and D).

Typically these digital interfaces employ parallel LVDS buses, so they can consume a lot of the FPGA’s I/O pins. However, parallel interfaces provide the best latency and because they use differential signalling, they also reduce the radiated noise which is often important for high-performance systems.

Having received the data from the FPGA in four data streams you may be wondering how you can process the data internally within the FPGA. One common method is used for a number of applications—including telecommunication processors and radio astronomy—is to use combined or split FFT structures as shown in the two figures below:

Combined 512-point FFT using four 128-point FFT pipelines, plus application of the twiddle factors and a parallel 4-point FFT.

Split 512-point FFT. This is inverse of the combined FFT. Recombination of the high-speed input occurs in the first two stages, unlike the Combined FFT.

As these real data samples, you will need to address the optimum method of handling these within the FFT structure. Efficent, large FFT implementation is a complex area of research but many applications use Weighted Over Lap and Add (WOLA) structures prior to the FFT stage due to the improved spectral leakage, as shown in the two images below contrasting the behavior of a normal FFT with a rectangular window versus an FFT with WOLA:

Adjacent Channels with normal FFT rectangular window

Adjacent channels with WOLA approach, showing much less spectral leakage.

Post processing of the resultant FFT data is then dependent upon the demands of the application.