The Hot Chips symposium has once again puts its finger on the Zeitgeist of the processor industry with sessions on block chain, neural net processing, and Spectre and Meltdown vulnerabilities. For three days (Aug. 19-21), many of the computing and silicon design luminaries will gather in Cupertino, Calif., to share insights into the latest, real-world projects.

The event starts off with a day of tutorials, including a morning session of blockchain from IBM and Ripple. The IBM session covers the distributed database technology while the Ripple presentation focuses more on crypto currency enablement.

The afternoon session includes talks on neural net processing in the data center to the edge. The speakers include people from Xilinx, MIT and Cerebras Systems. The session should provide a good foundation for the main neural net presentations during the conference with a discussion on how to build an efficient architecture — including low power at edge and alternative architecture for neural net training.

The day one keynote will explore the full impact of the Spectre and Meltdown security side-channel attacks on modern CPU architectures. In an unusual move, the keynote will actually be a series of presentations, starting with Dr. John Hennessy, who co-wrote the seminal textbook on modern CPU design — Computer Architecture: A Quantitative Approach.

John Hennessy

In some ways, Hennessy's textbook promoted the kind of architecture approach that led to these subtle side-channel attacks with speculative execution and branch prediction designs. The full circle of view includes Paul Turner from Google, who discovered the vulnerabilities; Jon Masters from Red Hat on the software implications of these vulnerabilities, and Mark Hill from University of Wisconsin-Madison on the impact on processor architecture design.

The second day keynote is from Victor Peng, the new CEO of Xilinx. The leading FPGA vendor is undergoing major changes and has a new push for heterogeneous computer architecture and machine learning using FPGA architecture. There are also two other Xilinx presentations in the conference — an examination of the company's new Everest heterogeneous processing FPGA and a session on running neural net inference on FPGAs with Xilinx tools.

At this year’s Hot Chips there’s a number of interesting presentations from Google. The increased amount of Google participation shows how the company has expanded its in-house chip design capability beyond the Tensor Processing Unit (TPU).

The presence Hennessy — who is the chairman of Google's parent company, Alphabet — on the program committee certainly seems to have encouraged more Google participation. The chip related presentations form Google includes the Pixel Visual Core, a programmable chip for image, vision and AI processing. This chip is designed to be Google’s solution to beef up processing in its mobile devices. The other Google chip is called “Titan” and provides its root of trust for security. The other security chip presentation will be from Microsoft and will reveal the hardware security underpinnings for Azure Sphere.