Without question, 2018 was the year RISC-V genuinely began to build momentum among chip architects hungry for open-source instruction sets. That was then.

By 2019, RISC-V won’t be the only game in town.

Wave Computing (Campbell, Calif.) announced Monday (Dec. 17) that it is putting MIPS on open source, with MIPS Instruction Set Architecture (ISA) and MIPS’ latest core R6 available in the first quarter of 2019.

Art Swift, hired by Wave this month as president of its MIPS licensing business, described the move as critical to accelerate the adoption of MIPS in an ecosystem.

Derek Meyer

Going open source is “a big plan” that Wave CEO Derek Meyer, a MIPS veteran, has been quietly fostering since Wave acquired MIPS Technologies in June, explained Swift. Swift himself is a MIPS alumnus who worked at the company as a vice president of marketing and business development for four years.

Wave, which styles itself as a tech startup poised to bring “AI and deep learning from the datacenter to the edge,” sees MIPS as a key to advancing Wave’s AI into a host of uses and applications.

Included in MIPS instruction sets are extensions such as SIMD (single instruction, multiple data) and DSP. Swift promised that MIPS will bring to the open-source community “commercial-ready” instruction sets with “industrial-strength” architecture. “Chip designers will have opportunities to design their own cores based on proven and well tested instruction sets for any purposes,” said Swift.

Since 2000, 8.5 billion chips based on MIPS cores have been shipped, according to Swift. A broad range of customers are sticking with MIPS, including Microchip, Mobileye (now an Intel company), MediaTek, and Denso, Japan’s leading tier one.

Although commanding consistent respect among engineers, MIPS — whose ownership has been anything but stable — has struggled to build its ecosystem and generate momentum. MIPS trails far behind Arm today. Wave’s goal is to reverse a trend that looked for a long time like a downward spiral for MIPS.

Shrewd move

Asked how current MIPS partners reacted to Wave’s plan to open-source MIPS, Swift said, “Jaws dropped.” Among the comments: “Had this happened two or three years ago, RISC-V would have never been born.”

Asked if MIPS is coming to the open-source community too late, industry opinions appear split.

Linley Gwennap, principal analyst at the Linley Group, told EE Times, “MIPS is certainly behind RISC-V in mindshare in the open-source community.” He noted that MIPS was “unable to make this move sooner due to its various ownership transitions.”

Nonetheless, Gwennap added, “Given the advantages it [MIPS] offers, I think there is still time for it to gain design wins.”

Rupert Baines, CEO of UltraSoC, told EE Times, “Given RISC-V’s momentum, MIPS going open source is an interesting, shrewd move.” He observed, “MIPS already has a host of quality tools and software environment. This is a smart way to amplify MIPS’ own advantage, without losing much.”

He said, for some SoC designers, “MIPS can be an alternative to adopting RISC-V.”

A U.K. company based in Cambridge, UltraSoC supplies advanced debugging and analytic technology for embedded systems and it is an active supporter of the RISC-V. However, Baines has always maintained that choosing a processor core “shouldn’t be a religious war.” For chip architects and designers tasked to deliver heterogeneous systems which include different processors, the ISA is only a small consideration, he said. A much bigger issue is coping with the problem of complexity in a “whole system.”

Industry observers agree on the maturity of MIPS.

Gwennap said, “The MIPS ISA is more complete than RISC-V. For example, it includes DSP and SIMD extensions, which are still in committee for RISC-V.”

In addition, MIPS is a commercially proven ISA that has already shipped billions over more than two decades, said Gwennap, “The MIPS software development tools are more mature.” Further, he noted, “MIPS also provides patent protection and a central authority to avoid ISA fragmentation, both of which RISC-V lacks. These factors give MIPS an advantage for commercial implementations, particularly for customer-facing cores.”

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