February 18, 2020

40 St George St, Toronto, ON M5S 2E4

The Toronto RISC-V Meetup will be hosted following the “Accelerating AI – Challenges and Opportunities in Cloud and Edge Computing” Workshop conducted by CMC Microsystems.

The Open-Source RISC-V instruction set architecture (ISA) is finding broad application in emerging artificial intelligence and machine learning system-on-chip designs. This is in part thanks to the P-Extension for DSP/SIMD processing and V-Extension for vector processing of the ISA. This meetup will describe how easily the RISC-V IP with P-Extension and V-Extension can be augmented with custom instructions. See full agenda online.

FREE to attend

Time: 5:00pm to 7:00pm

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