During early days of microcontrollers we had only RAM and ROM, RAM: random access memory, that is volatile while ROM: read only memory, that is non volatile, and the method to create ROM was either OTP, that is one time programmable or UVEPROM: Ultra violet erasable programmable read only memory, that is we can erase using ultraviolet light and we can re program the ROM. The UVEPROM comes with a optically transparent top, and we had a gadget called eraser, where we can place the UVEPROMS and expose them for 5 minutes to erase, (all memory locations were set to 1's) and then another gadget to program those erased UVEPROMS.

The next was EEPROM, electrically erasable programmable read only memory, where the program voltage was different and using voltage was different, and in our circuits we had to switch to different voltage to erase and write the program, and come back to use the memory as ROM. The EEPROM has an advantage that you can write single byte. Internally it will go through an erase cycle and then write cycle. Nowadays you get EEPROM which can work at single voltage for both programming and reading.

For embedded products we had a device called PROM, programmable read only memory, (also called as OTP ROM, one time programmable read only memory) which can be programmed once and then use it in the system. This had programming facility either can be used in circuit, or can be got as pre programmed from factory and just assemble in the product.

The next was flash, a technology which revolutionized the embedded products, where you can use the same voltage for erasing, programming and reading. In flash memories the erase size is larger than programming size, and you should erase before writing. Erase would take more time than to program, and programming size is also higher, (even though you can program a single byte/word, it is better to program in specified size.

The embedded products demand gave rise to two kinds of flashes: NOR FLASH and NAND FLASH. NOR flash is common with ROM, EEPROM etc.., where you can integrate it with controller and it acts as memory on system bus and we can have XIP programs (execute in place) that can be programmed and used. Nowadays NOR flash is available with burst capability to match with SDRAMs and DDRAMs

NAND FLASH is another technology where the density is more, but this does not integrate as NOR flash to system bus, it can have block read, block write and block erase, and can simulate a disk drive. This has given rise to Compact flash, MMC cards, SD cards, USB pen drives, SSHD drives. Here each block can be read as reading blocks in disk drives, and for writing it has to be erased and written, and once again erase block size is higher than (usually 16 - 32 times) write block size. Also the NAND flash has some more area wherein you can place information such as CRC (cyclic redundancy code), ECC (error correction code), through which you can keep the integrity of data.

Regarding RAM, it comes in basically two flavours, SRAM: Static RAM, where density is low but can be integrated to system so that data can be accessed in single read/ write cycle. The time to read will be same as time to write, and you can place code / data / stack / heap on to this.

The SRAM posed limitation to he size and hence gave way to evolve DRAM Dynamic RAM. In Dram the density was high, but to achieve this the circuit could retain the data for only a finite amount of time (hence the term dynamic). It has to be periodically refreshed. Earlier days Z80 controller had a special interrupt driven code with pop's which use to periodically refresh the memory. SRAM also come with a very low power version where you can make it with battery back up and does not loose data during power cycles and virtually can act as ROM.

The DRAM technology evolved in a different way, SDRAM, Synchronous DRAM, which was an great evolution where memory reads and writes can be done in bursts to enhance the throughput, and they matched the cache lines of CPU to have burst reads and writes to optimize the performance. The speed of this was enhanced to DDR, double data rate DRAM, DDR2, twice the double data rate, DDR3, 4 times DDR, etc.. and this lead to make CPU coupled to memory (and also display) through high speed circuit (called as North Bridge). There are also display specific DDRs which integrates with both CPU and display in a special way to enhance the performance.

It will be incomplete if we do not mention about Cache memory. Cache memory is that which interfaces with CPU and performs at the same speed towards CPU side and do the burst transfers towards the main memory. There are two types of caches I-cache, instruction cache where program counter of CPU refers, and D-cache data cache where the data / stack / heap refers. Also there are several levels of caches, and the first or even second level cache will be integrated in the silicon itself.

The memory is still evolving and racing with CPU in its speed /density. Also it is evolving in storage sector.

Regards,

BV Ramesh.



