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Earlier this month, at the International Solid State Circuits Conference, Intel made headlines by declaring that future processors built on next-generation technologies like spintronics or quantum wells would likely be slower than current hardware, not faster.

The death of Moore’s law is a topic we’ve discussed before, but I want to revisit it from a somewhat different angle. Instead of walking through the specifics of Intel’s research, or the varying proposals for how we might “fix” the problem, let’s talk about some of the myths that cloud this issue and warp perception of the topic. Some of these issues are specific to Intel, others affect the broader semiconductor industry.

Myth: CPUs stopped scaling because Intel isn’t facing competition

One common misconception around Moore’s Law and performance scaling is that we haven’t really hit a wall. Intel just hasn’t had any reason to keep selling us microprocessors since AMD hasn’t been competitive enough to seriously threaten its business.

Here’s why it isn’t true.

Intel’s clock speeds didn’t stop rising when AMD launched Bulldozer. They mostly stopped growing by mid-2004 with the launch of Intel’s Pentium 4 570J — a 3.8GHz single-core CPU that drew roughly 240W of system power under load. The chart below shows how Intel’s high-end CPU configurations changed between 2004 and 2015.

In 2004, Intel’s highest-clocked chip was a low-efficiency CPU designed for high clock speeds, not efficient operation. Over the course of 11 years, Intel drastically slashed per-core power consumption, cut overall TDP across its product lines, and vastly improved performance. I can’t find any modern data sets that compare a Pentium 4 with current hardware, but Anandtech Bench has a comparison between the Pentium 4 660 (a 3.6GHz CPU with HT) and the Intel Core i7-990X. The 2011 chip is 2.4x faster in single-threaded tests, even when operating at a modest clock speed deficit of 200MHz.

The only thing the Pentium 4 and a modern-day Skylake have (roughly) in common is their maximum frequencies. Scaling didn’t entirely stop, but even the Core i7-4790K is clocked just 15% higher than the old Pentium 4.

Myth: Intel could clock its CPUs higher, if it wanted to

Like most myths, there’s a kernel of truth to this. Yes, Intel could run its CPUs at higher frequencies, but not much higher, and not without enormous costs. Take a look at Skylake power consumption as clock speeds rise.

Moving from 4.2GHz to 4.7GHz gets you 11% more clock, but requires 53% more power. That’s an abysmal performance-per-watt ratio. I don’t doubt that there are ways Intel could improve the situation — it could de-lid the CPUs (or at least use solder instead of paste between the shield and the core). It could probably tune its fabs for higher frequencies. It could bin chips and only sell the very best of the best for overclocking, at increased prices. It could require motherboard manufacturers to use extremely robust board designs if they wanted to support its overclocking processors.

Even if all those changes combined gave Skylake another 600MHz of headroom, the Core i7-6700K would still consume 53% more power for a 26% frequency increase. It’s not worth it. The return on investment is too low.

While we’ve been discussing these trends as they impact Intel and Intel x86 chips, there is no magic solution for ARM, AMD, or Nvidia. Graphics cards have evolved more quickly than CPUs these past few years, but the pace of improvement has slowed for them as well. Eleven years ago, Nvidia’s GeForce 7800 GTX was roughly twice as fast as the old GeForce 6800 Ultra, which had launched 12 months previously. Today, it took Nvidia roughly 30 months to double performance, from the 2012 launch of the GTX 680 to the late 2014 debut of the Nvidia GTX 980. As always, these figures are approximate, but the train has slowed down for everyone, not just Intel.

Myth: A solution must be right around the corner

A belief in the inevitability of progress and continual improvement is welded into most Western philosophy and embedded in American culture. Semiconductor scaling was, perhaps, the most potent real-world demonstration of progress that the human race has ever experienced. For decades, every generation of technology was meaningfully, noticeably, better than the first. Computers went from building-sized to pocket-friendly. The news cycle often feeds this perception, with a never-ending run of stories promoting the idea that a bright semiconductor future is right around the corner.

The actual team of engineers, scientists, researchers, and corporate fellow that develop roadmaps and research new technologies take a different view. The International Technology Roadmap for Semiconductors released a report in July 2015 covering the major changes to Moore’s Law since before the group was founded, as well as data on how long it has taken between when a technology is first proposed and when it comes to market.

The fastest path between proposal and implementation was high-k metal gate, which took “just” nine years to come to market. The slowest was raised source/drain, which took almost 20.

There’s another nuance to this point that’s often missed in discussions of the topic. From the 1960s through to around 2000, process node scaling actually reflected true, geometric shrinks. From 2000 forward, we’ve used what the ITRS calls “equivalent scaling.” That translates to “dump a chum bucket of new innovation in design, manufacturing, and materials into the node and call it a new process.”

Intel’s clock speed limits are a reflection of this shift. The properties of silicon have made it extremely difficult to clock at high speeds and shrinking geometric features no longer yields the power consumption and voltage reductions that it did before 2000.

If graphene, which was first isolated in 2004, or carbon nanotubes, which first came to prominent attention in 1991, were going to save our bacon from the collapse of Moore’s Law, we’d already know about it. For decades, the ITRS has functioned as a mechanism for identifying which technologies would be introduced at which nodes and how those nodes would be characterized.

There have always been differences — Intel introduced FinFET at 22nm; TSMC and Samsung / GF waited until 14nm. AMD adopted immersion lithography at 45nm and double-patterning at 32nm, Intel waited until 32nm to adopt immersion lithography but was using double-patterning as early as 45nm. In many ways, however, the industry has advanced together, with multiple semiconductor and technology conferences a year where papers are presented and best practices discussed. Researchers have been hunting for conventional techniques that would restart the old scaling engine for decades. They haven’t found any.

This chart from a paper comparing beyond CMOS technologies shows the switching delay and power consumption of both CMOS and other technologies that have been proposed as replacements.

It’s drawn from an extensive comparison of next-generation, post-CMOS technologies that found only one technology shift, to van der Waal FETs offered even a modest performance improvement and a simultaneous power reduction.

Intel and other firms continue to research III-V semiconductors, but there are no easy materials waiting in the wings, no next-generation semiconductor structures to boost clock speeds, and next-generation lithography is making painfully slow progress.

Myth: The death of Moore’s law means the death of performance improvements

The reason Intel is talking about trading raw performance for rock-bottom power consumption in future technology is because it looks like we can hack a path in that direction, as opposed to staring at the rubble of conventional scaling for another decade.

The following two graph shows relative performance between designs in a thermally constrained environment.

These graphs show how next-generation semiconductor structures could improve performance in power-constrained environments — and all computing, these days, is considered to take place in a power-constrained environment due to hot spot formation on the die, as well as the general popularity of mobile devices.

I don’t want to replace one myth with another, especially since two of these techniques — ExFETs and graphene n-p junction — rely directly on graphene, a material that hasn’t proven willing to bend to our will of late. Given that modern high-powered CMOS already operates under power limitations at the device level (typically 140W for CPUs and 250-300W for GPUs), it’s possible that some next-generation materials might be used to create devices which, while not faster than CMOS in an absolute sense, reach higher throughputs under real-world testing conditions.

Myth: Transistor density can continue scaling indefinitely

Semiconductor densities have kept growing long after clocks and power consumption stopped, but it’s a short-term reprieve. As Paolo Gargini, chair of the ITRS, told Nature: “Even with super-aggressive efforts, we’ll get to the 2–3-nanometre limit, where features are just 10 atoms across. Is that a device at all?”

At some point, it’s going to become too difficult to continue building structures side-by-side because we won’t have enough atoms to construct transistors. Building 3D structures is another potential loophole we can exploit to improve densities by stacking dies, but no one has figured out how to do the same with CPUs or GPUs — far too much power becomes trapped in the die.

The multi-faceted future

So what comes next? The short answer is “everything.”

Heterogeneous compute. Specialized embedded sensors. New techniques for lowering power consumption. New materials and technologies. 3D stacking. Moving RAM on-package or integrating larger DRAM buffers. New memory technologies.

Research into cutting-edge semiconductor techniques and revolutionary all-new methods of computing (from quantum machines to mimicking the brain) will continue. So will research into materials like graphene and carbon nanotubes. While there’s no serious potential for a short-term improvement (remember, it typically takes 10-15 years for a major breakthrough to manifest as a shipping products), the entire industry is pivoting to focus on low power precisely because consumers have identified low-power devices as the future of entertainment, computing, and cutting-edge design.

The desktops and laptops of 10 years from now may be iterative improvements — faster, certainly, with higher resolution displays and lower costs overall, but perfectly recognizable compared to the hardware we have today. Further research into smartphones and wearables, however, could finally produce the elusive holy grail of all-day battery life and high performance that eludes current-day products. Either way, the pace of evolution won’t be zero.

Now read: What is Moore’s Law?