Sangiovanni-Vincentelli been with UC Berkeley for 41 years and was involved with the founding of Cadence and Synopsys.

“The industry is now benefitting from the power of embedding UltraSoC IP into systems not only to debug the silicon in development, but to analyse and continually monitor performance, power, safety and security in critical applications,” says Sangiovanni-Vincentelli, “UltraSoC has made a very strategic move in applying this capability to the growing ecosystem for the RISC-V open-source processor platform, as well as to all standard processor architectures.”

The appointment comes as UltraSoC drives accelerating adoption of its IP for debug during chip design, and of its embedded intelligent analytics capabilities for monitoring wider system performance on all processor platforms and, in particular, the open-source RISC-V architecture.

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