Given how important chips are to modern society EVERYONE should understand and appreciate how they are made. Every field has its own set of terms, jargon, and acronyms (engineers love acronyms!). As you would expect, chip design is no different. If you are new to chip design, it might take you a few days to read through the Wikipedia entries for each one of these 200 topics. If you are interested in actually building chips, you will need to master all 200 of them. The sources for the table can be found HERE. (PR’s appreciated)

Cheers!

Andreas Olofsson is the founder of Adapteva and the creator of the Epiphany architecture and Parallella open source computing project. Follow Andreas on Twitter.

Chip Architecture

Chip Design

Manufacturing

BEOL: Back end of line processing for connecting together devices using metal interconnects.

Dicing: Act of cutting up wafer into individual dies

FinFet: Non planar, double-gate transistor.

Photo-lithography: Process used in micro-fabrication to pattern parts of a thin film or the bulk of a substrate.

Photomasks: Opaque plates with holes or transparencies that allow light to shine through in a defined pattern.

Reticle: A set of photomasks used by a stepper to step and print patterns onto a silicon wafer.

Semiconductor Fabrication: Process used to create the integrated circuits

Silicon: Element (Si) forms the basis of the electronic revolution.

Silicon on insulator: Layered silicon–insulator–silicon with reduced parasitic capacitance.

Stepper: Machine that passes light through reticle onto the silicon wafer being processed.

TSV: Vertical electrical connection (via) passing completely through a silicon wafer or die.

Wafer: Thin slice of semiconductor material used in electronics for the fabrication of integrated circuits.

Wafer thinning: Wafer thickness reduction to allow for stacking and high density packaging.

Packaging

3D IC’s: The process of stacking integrated circuits and connecting them through TSVs.

BGA: Ball grid array is a type of surface-mount packaging (a chip carrier) used for integrated circuits.

BGA substrate: A miniaturized PCB that mates the silicon die to BGA pins.

Bumping: Placing of bumps on wafer/dies in preparation for package assembly

DIMM: Dual in lin memory module

Flip-chip: Method of bonding a silicon die to package using solder bumps

IC Assembly: Semiconductor die is encased in a supporting case “package”.

Interposer: Electrical interface used to spread a connection to a wider pitch.

Heat sink: A passive heat exchanger.

Heat pipe: Device for efficiently transferring heat between two solid interfaces

KGD: Known Good Die. Dies that have been completely tested at wafer probe.

Leadframe: Metal structure inside a chip package that carry signals from the die to the outside.

POP: Package on Package

SIP: System In Package

SMT: Technique whereby packaged chips are mounted directly onto the PCB surface.

Wirebond: Method of bonding a silicon die to a package using wires

WSI: Wafer scale integration

Test