LLVM Weekly - #307, November 18th 2019

Welcome to the three hundred and seventh issue of LLVM Weekly, a weekly newsletter (published every Monday) covering developments in LLVM, Clang, and related projects. LLVM Weekly is brought to you by Alex Bradbury. Subscribe to future issues at http://llvmweekly.org and pass it on to anyone else you think may be interested. Please send any tips or feedback to asb@asbradbury.org, or @llvmweekly or @asbradbury on Twitter.

News and articles from around the web

The next Toronto LLVM/Clang social meetup will take place on Tuesday November 26th and include a presentation on writing loop optimisations in LLVM.

The next HelloLLVM/HelloGCC social in Shanghai will take place on Nov 23rd.

Videos from the 2019 LLVM Dev Meeting have started to appear on the LLVM YouTube channel.

On the mailing lists

LLVM commits

An IRTransformations directory was added to the LLVM examples, to contains example transformation/analysis code used by tutorials. 7d0b1d7.

LLVM's SHA1 implementation was optimised, resulting in a 10% improvement of linking time for LLD. 43ff634.

The AArch64 backend can now spill/fill callee-saved SVE registers. 84a0c8e.

InitializePasses.h includes were sunk in order to reduce the number of recompiles needed when it's modified. 05da2fe.

More work has been done on MIPS GlobalISel, with support for selecting addiu, andri, ori, xori. dda8e95, 1f55935.

The RISC-V backend can now handle variable sized objects on the stack in the case that the stack must be realigned. cf6cf0c.

Clang commits

-Wtautological-compare was added to -Wall . 9740f9f.

The -march and -mabi selection logic for RISC-V in the Clang driver was updated to more closely mirror GCC defaults. e3d5ff5.

Clang gained intrinsics for Arm MVE contiguous load/stores, vector get/set lane, and more. a12f588, 9e37892.

Other project commits