[Mesa-dev] [ANNOUNCE] mesa 17.0.7

Mesa 17.0.7 is now available. Note: this is the final anticipated release in the 17.0 series. Users are encouraged to migrate to the 17.1 series in order to obtain future fixes. In this release we have: The mesa GLVND GLX library now handles glXGetDriverConfig, as used by driconf. For EGL the error checking within eglMakeCurrent has been relaxed. On the driver side: i965 and ANV have improved DXT1 and BC1 format handling. And the i965 vec4 backend has a few uniforms related fixes. The nouveau, etnaviv and vc4 drivers have seen minor improvements. Last but not least, we have several Wayland patches improving event queue handling. Andres Gomez (1): docs: add sha256 checksums for 17.0.6 Bartosz Tomczyk (1): mesa: Avoid leaking surface in st_renderbuffer_delete Chad Versace (1): egl: Partially revert 23c86c74, fix eglMakeCurrent Daniel Stone (7): vulkan: Fix Wayland uninitialised registry vulkan/wsi/wayland: Remove roundtrip when creating image vulkan/wsi/wayland: Use per-display event queue vulkan/wsi/wayland: Use proxy wrappers for swapchain egl/wayland: Don't open-code roundtrip egl/wayland: Use per-surface event queues egl/wayland: Ensure we get a back buffer Emil Velikov (6): st/va: fix misplaced closing bracket anv: automake: list shared libraries after the static ones radv: automake: list shared libraries after the static ones egl/wayland: select the format based on the interface used Update version to 17.0.7 docs: add release notes for 17.0.7 Eric Anholt (2): renderonly: Initialize fields of struct winsys_handle. vc4: Don't allocate new BOs to avoid synchronization when they're shared. Hans de Goede (1): glxglvnddispatch: Add missing dispatch for GetDriverConfig Ilia Mirkin (1): nvc0/ir: SHLADD's middle source must be an immediate Jason Ekstrand (2): i965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops i965: Round copy size to the nearest block in intel_miptree_copy Lucas Stach (1): etnaviv: stop oversizing buffer resources Nanley Chery (2): anv/formats: Update the three-channel BC1 mappings i965/formats: Update the three-channel DXT1 mappings Pohjolainen, Topi (1): intel/isl/gen7: Use stencil vertical alignment of 8 instead of 4 Samuel Iglesias Gonsálvez (3): i965/vec4/gs: restore the uniform values which was overwritten by failed vec4_gs_visitor execution i965/vec4: fix swizzle and writemask when loading an uniform with constant offset i965/vec4: load dvec3/4 uniforms first in the push constant buffer Tom Stellard (1): gallivm: Make sure module has the correct data layout when pass manager runs git tag: mesa-17.0.7 https://mesa.freedesktop.org/archive/mesa-17.0.7.tar.gz MD5: 4b4e94d69f25161b3bc5267121469fac mesa-17.0.7.tar.gz SHA1: 20b0a3c8526426007fd7a8c14cdb7ec7e6dfd7f9 mesa-17.0.7.tar.gz SHA256: bc68d13c6b1a053b855ac453ebf7e62bd89511adf44bad6c613e09f7fa13390a mesa-17.0.7.tar.gz SHA512: 09e3f3d6dcba798ad9cfa24b99312fc2776256531664dbe2e7061c6e84975503c39f7b7bbc9f1c47f1bed2ebce74987dcb73a40de83436034f69307954e08b23 mesa-17.0.7.tar.gz PGP: https://mesa.freedesktop.org/archive/mesa-17.0.7.tar.gz.sig https://mesa.freedesktop.org/archive/mesa-17.0.7.tar.xz MD5: 8d088c8f7a099084ac745646ed1ad62b mesa-17.0.7.tar.xz SHA1: 33eecf0d137ad31bc91d2863447766aa42d2df43 mesa-17.0.7.tar.xz SHA256: f6d75304a229c8d10443e219d6b6c0c342567dbab5a879ebe7cfa3c9139c4492 mesa-17.0.7.tar.xz SHA512: 378d643cf63ec3ed5fd093c00079fb03375f6a87875d3583a5d4707d3d6b21934194b0f624f4ed261c9a05a2fe3e9f292dcd8466e82cfb95d919459e3eb635ea mesa-17.0.7.tar.xz PGP: https://mesa.freedesktop.org/archive/mesa-17.0.7.tar.xz.sig