Logic gate design

The mechanical logic gates presented in this work are based on bi-stable flexure mechanisms. We begin by describing the basic buckled flexure element and how it represents logic states. The undeformed shape of one such buckled flexure design is shown in Fig. 1a. When the structure is compressed horizontally by a fixed distance h that exceeds the critical buckling threshold, the rigid body marked with S will no longer be stable at the original equilibrium position d S = 0, but will instead rest at either one of the two stable positions, d S = −s and d S = +s as shown in Fig. 1b, where the +s position represents a logic 1, and the −s position represents a logic 0. By virtue of symmetry, the two stable states occupy the same energy with an energy barrier in between that must be overcome to transition between the states. This extra energy required for the transition is released from the system after the transition completes, and thus can be used to trigger the transition of the next bi-stable flexure logic element regardless of whether it is from 0 to 1 or from 1 to 0. This is particularly advantageous to a large mechanical computing system because it allows for mechanical digital signals to propagate in a wavelike manner with minimum attenuation. Fig. 1c plots the FEA result of the total potential energy E p stored in the deformed flexures as a function of the position d S and the compression distance h. The magnitude of the energy barrier can be tuned by adjusting the compression distance h, which is an additional design parameter apart from geometric dimensions. When the value of h increases beyond the second critical buckling threshold (h = 0.163 L for the design shown)21, secondary bifurcations occur in the post-buckling system21,22, resulting in issues such as multi-mode buckling and mode jumping23,24 as the mechanism switches between the two logic states. Such undesirable behavior may empirically be avoided by constraining the compression distance h to be less than the critical distance h 2 corresponding to the second buckling mode. Therefore, when designing the bi-stable flexures, it is more desirable in general to have a large range between the first and second critical compression distances [h 1 , h 2 ]. The design topology shown in Fig. 1a is chosen among several alternatives for its better buckling mode stability. The buckling mode analysis results of the proposed design are compared against an alternative Design B in Fig. 1d, where the rigid bodies are simply connected by a pair of parallel beams. The FEA results suggest that Design A has a more stable first buckling mode and thus constructs a more robust bi-stable system. In addition, Design A generates a larger distance between the two stable positions d S = ±s, which results in a stronger binary signal. Other bi-stable mechanism designs that were considered are provided in Supplementary Table 1.

Fig. 1 Design of bi-stable flexure mechanisms. a Undeformed shape of a bi-stable flexure mechanism with a smallest feature size t = L/30, where L is the length of a bi-stable flexure. b Two buckled shapes of the bi-stable flexure mechanism that are generated using COMSOL Multiphysics® where high-stress regions are indicated by bright colors. c Total deformation energy E p as a function of the position d s and compression distance h for the bi-stable flexure mechanism in b. d Undeformed shape, first, and second buckling mode shapes and their corresponding critical compression distance h 1 and h 2 of two different bi-stable flexure mechanism designs. Design A was chosen for this study due to the large distance between 1st and 2nd buckling modes which means the logic gate is more tolerant to errors in the fixturing during precompression Full size image

Fig. 2 Design of mechanical logic gates. a Undeformed shape of the NOT gate. b A conceptual design of a mechanical inverter using flexible beams. c Geometry configurations of the NOT gate at the two stable states representing the negation of logic 0 and logic 1, respectively. d Geometry configurations of the OR gate at Mode I (0 OR 0), Modes II & III (0 OR 1 and 1 OR 0), and Mode IV (1 OR 1). e Geometry configurations of the NAND gate at Mode I, Modes II & III, and Mode IV. f Quasi-static timing diagram of the outputs of NOT, OR, and NAND when the inputs (A, B) transition from (0, 0) to (1, 0) to (1, 1) Full size image

By utilizing the bi-stable flexure mechanism as a building block, we constructed larger logic gate mechanisms. In these mechanisms, the rigid bodies are linked through bi-stable flexures and the resulting relationships between their motions are used to represent the basic digital logic operations. For instance, a mechanical NOT gate was designed as shown in Fig. 2a. Its working principle is similar to a mechanical inverter proposed by Merkle14 shown in Fig. 2b, but instead of flexible beams, the proposed NOT gate uses the bi-stable buckling flexures to provide the negation of the input signal. Under a fixed buckling compression distance h (Fig. 2a), the structure has two stable configurations as shown in Fig. 2c, representing the negation of the input 0 and 1, respectively. Unlike many other mechanical NOT gate designs that use rotational joints to reverse the direction of a mechanical displacement or force, this NOT design uses no rotary connectors and therefore is easier to manufacture additively and does not suffer from issues like energy loss and device failure due to friction and wear. A mechanical OR gate was constructed by joining two sets of the bi-stable flexure mechanism together as shown in Fig. 2d. The vertical positions of the two rigid bodies A and B are controlled externally; whereas, the vertical position of the rigid body C represents the output. Similar to the previously described compression process, the OR gate was compressed horizontally by a total distance of 2 h under a set of initial small perturbational forces that resulted in the deformed shape of Mode I in Fig. 2d, where the two inputs are 0 and 0, and the output is 0. When the two inputs A and B switch between logic state 0 and 1, the rigid body C moves accordingly to generate the logic OR operation as shown in Fig. 2d. A functional-complete NAND gate was constructed using the aforementioned OR gate and NOT gates. Inside the NAND gate, the input signals A and B are inverted by two NOT gates, which pass the negation signals to the OR gate through the middle layer X and Y, resulting in a final output C. Figure 2e demonstrates the configurations of the NAND gate at different logic states. The quasi-static timing diagrams of the input(s) and the output of the NOT, OR, and NAND gate were obtained using COMSOL and are shown in Fig. 2f. The FEA result suggests that the proposed logic gates can perform continuous logic operations without resetting to an initial configuration. Similar to the design of the OR and NAND gates, AND and NOR gates were also constructed using the same bi-stable flexure mechanisms, the details of which can be found in Supplementary Note 1.

Fabrication techniques and experimental results

A macroscale (about 250 mm by 250 mm) NAND gate was 3D-printed using ABS plastic (with an elastic modulus of 2230 MPa) as shown in Fig. 3a. To deform the structure into the buckled shape, the two rigid bodies G1 and G2 were compressed inward while the rigid body G3 is fixed to the ground. An Instron mechanical tester was then used to measure the force-displacement relationships of the NAND gate’s input(s) when switching between different logic states. Figure 3b plots the total force on the rigid bodies A and B against their vertical displacement when the NAND gate transitioned from Mode I (0 NAND 0) to Mode IV (1 NAND 1). FEA and experimental confirmation of other logic transitions for the NAND and NOR gates can be found in Supplementary Figure 5. The experimental results agree with the FEA results obtained from COMSOL to within the error of the measurement.

Fig. 3 Fabrication and experimental testing of the mechanical logic gates. a A macroscale NAND gate printed by a commercial Fused Deposition Modeling (FDM) 3D-printer Stratasys F370 using material ABS-M30™. b Experimental and FEA results of the total force on the two rigid bodies A and B as the inputs a, b transition from (0, 0) to (1, 1). c A mesoscale NAND gate printed using projection microstereolithography. d Fabrication process of a bi-stable flexure mechanism that combines two-photon stereolithography (2PS) with holographic optical tweezers (HOT). e A bi-stable flexure mechanism fabricated at micro-scale that can be driven between two stable positions Full size image

A mesoscale (about 25 mm by 25 mm) NAND gate was fabricated using projection microstereolithography25 as shown in Fig. 3c. In order to fabricate the proposed mechanical logic gates at micro-scale, a new approach26 is demonstrated that combines the utility of two-photon stereolithography (2PS)27 with holographic optical tweezers (HOT)28 into a single apparatus. The 2PS approach is used to print polymer structures with submicron resolution, and the HOT approach is used to exert optical forces on the structure to introduce stored strain energy into the flexures. The complete fabrication and actuation process was demonstrated for a bi-stable buckling flexure mechanism (Fig. 3d). The final fabricated bi-stable element has an overall size of 38 × 38 × 3 µm and flexure thicknesses of 800 nm. The rigid bodies S and G2 were free to move while the rigid body G1 was fixed to the substrate. Next, two optical traps were created at the ends of the rigid body G2 which pulled G2 into contact with G1. This movement caused the flexures to buckle and deform into one of the stable positions. With the two ends of the rigid bars in contact, they were fused together at the interfaces by locally curing the photopolymer via the 2PS approach. To imitate a digital logic signal, the center bar was driven by an optical trap which switched the bi-stable mechanism between the up position and the down position (Fig. 3e). A video of the fabrication and testing of the micro-scale bi-stable element can be seen in Supplementary Movie 1.

The current 2PS/HOT system has a minimum micro-fabrication resolution of 800 nm and can generate optical trapping forces of up to 50 pN, which in theory is capable of fabricating a logic gate of 100 µm size. A rough estimation from first principles suggests that logic gates at this scale can perform logic operations at Mhz frequencies. This estimation will be further investigated and verified in our future work.