Part Placement SMD component orientation consistent clearance for IC extraction tools all polarized components checked place thruhole components on 50 mil grid check the orientation of all connectors minimum component body spacing bypass capacitors located close to IC power pins verify that all series terminators are located near the source I/O drivers near where their signals leave the board PCB has ground turrets, power rail test points, and test points for important signals, all labeled EMI and RFI filtering as close as possible to exit and entry points in shielded areas layout PCB so that any rework or repair of a component does not require removal of other components potentiometers should increase controlled quantity clockwise mounting holes electrically isolated or not proper mounting hole clearance for hardware SMD pad shapes checked tooling holes for automated assembly sufficient clearance for socketed ICs Routing digital and analog signal commons joined at only one point check for traces running under noisy or sensitive components no vias under metal-film resistors and similar poorly insulated parts check for traces which may be susceptible to solder bridging check for dead-end traces, unless used on purpose ensure schematic software did / did not separate Vcc from Vdd, Vss from GND as needed provide multiple vias for high current and/or low impedance traces component and trace keepout areas observed ground planes where possible Dimensions hole diameter on drawing are finished sizes, after plating. finished hole sizes are >=10 mils larger than lead silkscreen legend text weight >=10 mils pads >=15 mils larger than finished hole sizes components >=0.2″ from edge of PCB test pads 200 mils from edge of board

Dimensions cont. traces >= 20 mils from edge of PCB thru-hole drill tolerance noted thru-hole soldermask tolerance noted thru-hole route tolerance noted thru-hole silkscreen legend tolerance noted trace width sufficient for current carried sufficient clearance for high voltage traces Silk Screen no silkscreen legend text over vias (if vias not soldermasked) or holes all legend text reads in one or two directions company logo in silkscreen legend company logo in foil copyright notice on PCB date code on PCB PCB part number on PCB assembly part number on PCB PCB revision on silkscreen legend assembly revision blank on silkscreen legend serial number blank on silkscreen legend all silkscreen text located to be readable when the board is populated all ICs have pin one clearly marked, visible even when chip is installed high pin count ICs and connectors have corner pins numbered for ease of location silk screen tick marks for every 5th or 10th pin on high pin count ICs and connectors Other CAD design rule checking must be turned on high frequency circuitry precautions observed extra connector and IC pins accessible on prototype boards, just in case check hole diameters for odd components: rectangular pins, spring pins soldermask does or does not cover vias no acute inside angles in foil soldermask swell checked manual netlist check check netlist for nodes with only one connection drill origin is a tooling hole PCB thickness, material, copper weight noted thermal reliefs for internal power layers solder paste mask openings are proper size blind and buried vias allowed on multilayer PCB PCB layout panelized correctly high frequency crystal cases should be flush to the PCB and grounded