As power consumption has become one of the most important metrics of CPU design, we’ve seen a variety of methods proposed for lowering CPU TDP. Intel makes extensive use of dynamic voltage and frequency scaling, ARM has big.Little, and multiple companies are researching topics like near threshold voltage (NTV) scaling as well as variable precision for CPU and GPU operations. Now, one small embedded company, Ambiq Micro, is claiming to have made a breakthrough in CPU design by building a chip designed for subthreshold voltage operation — with dramatic results.

Ambiq’s new design strategy could be critical to the long-term evolution of the wearables market, the Internet of Things, and for embedded computing designs in general — if the company’s technology approach can scale to address to a wide range of products.

Subthreshold and near-threshold voltage operation

The threshold voltage of a transistor is the voltage point required to create a conducting path between the source and drain terminals. In simplest terms, this is the point at which the transistor turns “on.” The voltage threshold is not an absolute, however — operation is possible in both the near-threshold and subthreshold regions.

The problem with NTV and subthreshold designs is that they tend to suffer from high amounts of leakage current, as shown above, and are capable of only very low operating frequencies within these voltage ranges. This can actually lead to higher energy consumption overall — by constantly operating in the subthreshold region, the total amount of energy a chip leaks can result in higher power consumption than would result if the SoC just ran at conventional voltages and then power gated cleanly or shut itself off.

To understand the problem with subthreshold circuits and performance, imagine you had to distinguish between an alternating field of white and black squares. The human eye can perform this feat relatively easily — even when the white-black swap occurs at high speeds, we can tell the difference between the two.

Ask people to identify the difference between two slightly different shades of gray, however, and they can only do so when the frames are presented for a much longer period of time. The eye will tend to combine the two shades into a single perceived hue — this fact is widely used in Twisted Nematic (TN) monitors to produce simulated 8-bit color using fast 6-bit panels. Instead of displaying a given shade — say, Red 250 — the monitor will alternate between Red 246 and Red 254. Flip between these two shades quickly enough, and the eye naturally “averages” them out to Red 250.

This difficulty between determining the “on” versus the “off” state is a major limiting factor on subthreshold operation and requires designing circuits to extremely tight tolerances. What Ambiq claims to have developed is a new method of designing circuits, dubbed Sub-threshold Power Optimized Technology (SPOT). The company’s full whitepaper is available.

Ambiq is claiming that its Apollo microcontroller, which is based on the ARM Cortex-M4 design with FPU, can deliver power consumption equivalent to a Cortex-M0+ part without compromising its M4 with FPU performance. That’s actually more significant than it sounds — the graph tot he right shows the results of a performance comparison and power analysis between the Cortex-M0 and Cortex-M4 , as published by EDA360 Insider.

The green line is the M4, while the yellow line is the Cortex-M0. According to that report: “The ARM Cortex-M4 with its SIMD and floating-point capabilities ran the tests 12 to 174 times faster than the ARM Cortex-M0 core and consumed 2x to 9x more power.”

In other words, a subthreshold version of the Cortex-M4 with Cortex-M0 power consumption would be an embedded chip that meshed the best of both worlds — incredible power efficiency and far more embedded performance than is currently available.

Why subthreshold embedded performance matters

In previous years, accomplishments like this in the embedded market would be of limited interest to anyone else. The combined pushes for better wearables and the growing Internet of Things, however, makes innovations like subthreshold voltage critically necessary. While there’s still a vast gulf between even a high-powered embedded chip like the Cortex-M4 and a Cortex-A7 smartphone class CPU, the only way to close that gap is to continue to push embedded performance per watt into new frontiers.

Ambiq is arguing that its new design and implementation approaches can double to quadruple power efficiency. Whether this is solely an embedded shift or if it can boost higher-end hardware is still unknown, but approaches like this could revolutionize embedded hardware — and make all-day smartwatch battery life a reality in the long run.

Now read: With Curie, Intel hopes to break new ground in wearables, sensors, and the Internet of Things