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So, after all the guesses, it seems to be true: Intel will continue its rapid integrated 3-D graphics improvement into Haswell generation , with more GT3 options across both desktop and mobile – including UltraBook – markets. Further cause for Nvidia to worry on the entry level discrete segment…

Remember all the polemics over the Net, whether Haswell will offer the same substantial performance jump in 3-D from the Ivy Bridge, as Ivy Bridge is expected to give compared to the Sandy Bridge, or if it will just be a smaller incremental upgrade? Well, both are right… how?

There are three distinct die choices here, it seems: one is the ULV focused dual core Ultrabook option but with up to GT3 graphics. The other is a mainstream desktop and mobile choice with 4 cores and GT2 graphics, just a bit faster than the best Ivy Bridge graphics – we're talking 20% to 50% extra GPU performance here. Then, there is the 'king of the hill', the 4 core CPU plus GT3 GPU die with graphics further double as fast as the GT2, i.e. well over twice, possibly thrice, the Ivy Bridge speed.

Now, this die is likely to have a very very fancy extra external cache option on a multi chip module too. Wait a second, aside from IBM Power7 superserver processors and such, why would anyone want to have a L4 cache, maybe even an eDRAM based one? The answer could be in sharing the system memory bandwidth resources between a powerful quad core CPU, what Haswell surely will be, and a powerful GPU with compute capabilities too.

To avoid such contention, having an additional large cache, implemented in a fashion similar to dedicated 'backside cache buses' seen on the old Pentium III processors many years ago, helps satisfy more CPU memory requests in that cache, leaving more memory bandwidth for the GPU. An exciting optional capability would be to designate a portion of that large cache as a 'scratchpad' memory for GPU compute and graphics usage – most high end GPUs do rely on internal directly addressable scratchpad memory besides the caches for such purpose.

How this extra cache connection would be implemented, we don't know yet – but it definitely makes no sense to put it on the usual DDR3 memory bus, since it would add lots of unwelcome extra latency there. But, since the 4 core CPU plus GT3 desktop and mobile graphics die will be different than the standard 4 core plus GT2 graphics die, yet they all share the same socket – it makes sense to implement the extra L4 cache bus on the bigger die, and keep that L4 cache connection to the MCM multi chip substrate without it being seen by the system at all.

As widely talked about, Haswell will be the first Intel mainstream CPU in a few years, after the Westmere low end DC part with graphics die, to bring back MCM packaging into the general desktop and mobile PC realm. So, the standard parts will have an option of integrating the PCH I/O bridge to the same package, saving quite a bit of board wiring and real estate for ultra-compact mobile computing – and I don't mean just UltraBooks here.

Talking about the UltraBooks, having GT3-class graphics inside a Haswell UltraBook is definitely going to help the cause of true 3-D capable ultrathin Intel platforms, without resorting to additional discrete graphics. It doesn't help companies like Nvidia, who seemingly lost a big chunk of its Apple future Ivy Bridge MacBook Air GPU deployment, as GT3 Haswell would likely obliterate that market in the long run. Of course, GT3 graphics on an UltraBook doesn't need L4 cache and such enhancements, since only two CPU cores will not compete much with it for the memory bandwidth.

On the desktop side, Nvidia and AMD entry level discrete graphics are definitely to be badly affected by this evolution, and lots of it is to be felt with the Ivy Bridge already. The midrange and high end GPU segments should go on as usual, though.

In summary, interesting times ahead this and next year… and that's even before we've seen the Ivy Bridge!