RapidWright is a tool from Xilinx Research Labs which enables users to manipulate both the synthesized netlist and implementation of 7 Series and up FPGAs and SoCs

While not a Xilinx official tool, RapidWright enables improved quality of result (QoR) and productivity. These improvements are provided by RapidWright’s use of modular implementation, overlay and shells.

On its own, RapidWright is not able to actually implement designs, for that we still use Vivado. To enable this close working relationship, communication between Vivado and RapidWright takes place using design checkpoints.

RapidWright integration with Vivado

If you are not familiar with design checkpoints, a design checkpoint is a compressed file that contains netlist, place and route information, and constraints.

Design checkpoint example content

There are four ways to design using RapidWright in our design flow:

Create routed circuits from scratch

Generate circuits using the library of parameterizable generators

Reuse or relocate placed and routed circuits from Vivado

Combine place and routed circuits together

One great use case of RapidWright is in debugging — often if there is an issue in the implementation we will insert an Integrated Logic Analyzer. However, inserting this ILA may result in the issue being masked or made worse as the implementation is changed. Using RapidWright, we can insert a ILA and preserve the existing placement and routing. The ILA is inserted using only the currently unoccupied resources.

RapidWright is also very powerful for helping to achieve the maximum possible performance when crossing super logic regions.

To get up and running with RapidWright, we need the following installed on our development system:

Once we have installed the prerequisites, we can install RapidWright by downloading the installation JAR.

With the installation JAR downloaded, we can open a terminal window (I used Win10 for this example) and run the command:

java -jar rapidwright-installer.jar

Running the RapidWright installer

After the installation is completed, you will see a device floor plan window. If you see this, the installation was successful. The installation process will also provide a BAT/CSH/SH scripts, running the appropriate script for your OS will configure the environment variables.

To effectively use RapidWright, we should also install, Eclipse, IntelliJ and Jupyter. The first thing to do is configure the Eclipse environment, as during installation we cloned the RapidWright source. When we configure the Eclipse environment, we are able to import an existing git repository on our local file system.

Importing the RapidWright source into Eclipse

With this all mapped in, we should be able to see the source in the Eclipse workspace.

RapidWright source in the Eclipse Workspace

The next step is to set up the IntellJ. Here, we need to open the RapidWright directory, and then depending upon if we use a Windows or Linux Machine, set the correct executable.

Setting up RapidWright in IntelliJ

With IntellJ installed and configured, we can navigate to:

RapidWright/src/com.xilinx.rapidwright/device/browser/DeviceBrowser

in the project browser, right click and select Run DeviceBrowser.main() this will open up the device browser.

Of course, in order to get the most from the RapidWright, we want to be able to work through some of the tutorials and begin to understand the RapidWrights design flow.

To do this, we use Jupyter notebooks to read in, manipulate and output the design checkpoints.

With Jupyter installed, the next step is to create the Jython 2.7 kernel. We do this using the following commands in a terminal window:

java com.xilinx.rapidwright.util.RapidWright — create_jupyter_kernel — this creates the Jyhton2.7 Kernel

Creating the Jython kernel

jupyter kernelspec install — This installs the just created kernel in the Jupyter kernel directory for use.

We can then open a Jupyter notebook using the command:

jupyter notebook

This will enable us to start working with RapidWright — a good starting point is the RapidWright tutorials available here.

To prove my installation worked correctly, I created a new notebook in my Jupyter environment that writes out a DCP for the Pynq Z1.

Notebook welcome page — note the DCP already exists as the notebook has been run

Inside the new Jython2.7 notebook, I import the device and the design from RapidWright. Once this is completed, I create a new design targeting a Pynq Z1 and then write out the DCP.

We can then download this DCP if we want and start integrating it with Vivado. However, as this is just a test DCP, I will leave it here for now and come back to RapidWright with a more a detailed example soon!

See My FPGA / SoC Projects: Adam Taylor on Hackster.io

Get the Code: ATaylorCEngFIET (Adam Taylor)

Access the MicroZed Chronicles Archives with over 300 articles on the FPGA / Zynq / Zynq MpSoC updated weekly at MicroZed Chronicles.