Hard news is a little scarce this time of year, but the rumor mill never rests, and the latest unconfirmed tidbit is especially intriguing. Italian site Bits ‘n Chips claims that Carrizo, the next-gen replacement for AMD’s Kaveri APU, could feature stacked, on-package memory.

The story cites "recent rumors circulating in circles close to AMD," and it’s almost entirely devoid of specifics. This isn’t the first time AMD has been linked to stacked memory, though. Last year, the firm revealed that it’s working with Hynix on High Bandwidth Memory (HBM) that uses stacked dies linked by through-silicon vias.

There’s also evidence that the technology will soon be ready for prime time. A Q3’2014 Databook (PDF) hosted on Hynix’s site and linked on Reddit lists two HMB products as being available "now." Both weigh in at 128MB—the same size as the embedded DRAM on Haswell CPUs equipped with Iris Pro integrated graphics. One is rated for 128GB/s of bandwidth, while the other clocks in at 102GB/s.

Carrizo is due next year, so incorporating stacked memory available in Q3 doesn’t seem like much of a stretch. The HBM will reportedly share the same package as the APU, but it won’t be integrated into the actual die.

Based on what we saw with Iris Pro, on-package memory can improve integrated graphics performance substantially. Carrizo’s GPU could get a nice boost from the technology, and so could applications that tap the chip’s mix of graphics and CPU cores for general-purpose computing.