While open source software is taking over the world, a push for open source hardware has been quietly building.

The RISC-V Foundation has been pushing its open sourced instruction set architecture for chips based on the long-established paradigms for reduced instruction set computing. And one of its most vocal advocates is Calista Redmond, the chief executive of the RISC-V Foundation, which is working to promote its adoption.

“I’ve always understood the potential short- and long-term impact of the RISC-V license-free ISA on the open source community,” Redmond said when she became the Foundation’s new CEO in 2019, citing its mission “of paving the way for the next 50 years of computing design and innovation…”

It’s been exciting to watch RISC-V attracting more and more believers. Over the years the ecosystem has grown “exceptionally fast,” Redmond said in a recent InsideHPC interview, citing the rise in artificial intelligence and machine learning. “The level of commitment to drive the mainstream adoption of RISC-V is like nothing I’ve seen before,” Redmond said, adding that it’s “exhilarating” to see the global community collaborating across industries “with the shared goal of accelerating the RISC-V ecosystem.”

Speaking with @WisseHettinga, @risc_v Foundation CEO @Calista_Redmond said that “@risc_v is truly an ISA that can be deployed in so many applications.” Visit us at #ew20 booth 3A-536 to find out more about the @risc_v revolution. #RISCVew20 pic.twitter.com/AZPXmNLThT — RISC-V (@risc_v) February 26, 2020

A wide spectrum of RISC-V projects has been launched including those for a wearable health monitor as well as chips for scaling out cloud data centers at the University of Bologna in Italy and Barcelona Supercomputing Center in Spain. Semico Research estimates that by 2025 there’ll be 62.4 billion RISC-V central processing unit (CPU) cores.

One use-case where RISC-V makes sense? An autonomous vehicle. The onboard processor for an autonomous vehicle needs to process what is going on in real-time. It needs to be low power, but at the same time offer high performance.

“By that time I look forward to seeing many new types of RISC-V implementations including innovative consumer devices, industrial applications, high-performance computing applications and much more,” Redmond said.

A RISC-V Revolution?

RISC-V has a “sweet spot” where proprietary architectures may be hard to fulfill, said Redmond in a January keynote talk at HIPEAC 2020 conference in Bologna. Such workloads are calling for customized processor design, an order chip giants such as Intel and AMD may have difficulty accommodating. She pointed out that cloud providers such as Amazon, Google and Alibaba are already designing their own chips, while Western Digital and NVIDIA have been shipping RISC-V microcontrollers in their products for years.

“By having a modular, simple design, you can technically innovate and disrupt in many different industries, across a wide spectrum of applications,” she said. “By having an open and free business model, you can bring down costs, and you can collaborate for the development of the workload you’re wishing to serve.”

But what’s most interesting is the different directions in which the community seems to be growing. The Foundation held 20 different regional events in 2019. “It’s not a solo aspiration,” she told the audience, touting a growing community that includes commercial interests and advance research as well as students and other open source collaborators — and implementations around the globe. In China, for example, the foundation has 30 members, and more than 200 people participating in local RISC-V associations.

Redmond cites a project in India that has “state-level support” to create six different RISC-V processors. There’s also an enthusiastic community in Japan. Redmond describes a full-day workshop on the Hitachi campus in Tokyo, after which “we were absolutely mobbed by interest from automotive, from HPC, and across a wide spectrum of interest stemming from Japan.”

RISC-V is also surprisingly popular in Pakistan, where 3,000 people showed up for two RISC-V events. The Foundation is now setting up its first dedicated RISC-V training facility in Pakistan.

Engineers as Entrepreneurs

Redmond told the HiPEAC audience that RISC-V helps companies reduce risks and costs while speeding up development time, allowing the industry to both optimize designs — and to innovate faster.

“Since implementation is not defined at the ISA level, but rather by the composition of the system-on-chip (SoC) and other design attributes, engineers can choose to go big, small, powerful or lightweight with their designs.” Redmond said.

In another HiPEAC video, Redmond notes the RISC-V could also disrupt the business side of things: “By getting rid of royalty fees and using a very collaborative approach, we’re seeing companies who get to product faster with more interoperability and partnership opportunities around the world.”

“We truly believe that we have an opportunity to disrupt the processor industry, as well as disrupting many industries that rely on technology,” she said.

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