Additionally, the program performance can be increased specifying the available amount of RAM using -Xms and -Xmx . -Xms specifies the minimum heapsize and -Xmx specifies the maximum size.

Accessed by the menu, the user can load the SPICE/Spectre subcircuit of the simulated model. Additionally, clicking themenu the user access the module help. Finally, usingentry, the user can save the loaded subcircuit.The loaded module is shown in the editor area. As an added value, the user can alter the loaded subcircuit before being saved to the hard-disk.

Results windows are composed by several dynamic plots according the magnitudes/state variables simulated. Those plots include several tools. Using the mouse scroll/secondary buttons the user can resize, zoom, print... the represented data.

Forandsimulators. As can be seen in the figure below, we control theand thethrough the different tabs. In each one, we can select whether a parameter is fixed or it suffers from variation. Depending on the simulation mode (Monte Carlo or Corner analysis), the variation is given by a deviation from the main value or a list of values.As shown in the figure, in this tab we can choose the simulation title and the desired analysis (or). If aanalysis is choosen, we can specify the number of simulations which are going to be run. Also, we can select if we want to simulate and plot the results, or only simulate and store the data for later analysis. In thesection, as users we can select to store directly the transient results in the hard-disk, or by contrast we choose a memory/hard-disk buffered mode.Additionally, we can reduce the amount of saved data.

andsimulators can be invoked through this window.As seen in the image bellow, we can select here the couple simulator-memristor model, or invoke the program help.A key area in the Main Window is the logging history, the place where we can analyze the program output.

Example of use

To show the framework capabilities we present a simple case of use: we will perform an 8-level writing operation in a 3x3 Resistive RAM (RRAM) crossbar array as shown in the figure.

In this crossbar scheme, the writing operation involves two different pulse generators and nine cells, each composed of one memristor. Each memristor cell can be modified to store eight different resistance values, from 0 to 7, linearly separated. Initially, all cells have a value of “0”. Rows and columns are numbered from 1 to 3. In this example, the desired operation will write a “7” in the second cell of the second row of the RRAM array (position [2, 2]). Crossbar array structures have structural problems. The main one refers to the spurious voltage which feeds the cells placed next to the selected RRAM. These voltages can modify the state variables in non- desired cells, and consequently, alter the stored values. In the circuit scheme, the target cell is filled with a striped pattern and cells that are sensitive to data alterations are filled with a dotted pattern.

The purpose of this example is twofold:

Determining all the parameters to perform the full state change —including feeding voltage and timing characteristics. Analyzing the impact on the non-selected cells when the writing operation is performed.

Following the proposed methodology, first we define the design constraints. In our example we will assume that the circuit power supply limits the maximum voltage with which the memristor is fed, besides we set a limit in the duration of the writing operation, thus we have:

Voltage supply should not exceed 2V . The operation should be performed in 15ns.

The next step is selecting the most appropriate memristor model. We will use Yakoptic et al. model with the default parameters because of its good trade-off between its accuracy and computational load, as well as the presence of a threshold in its behavior, which will help minimizing the cell data corruption effect. We proceed to simulate in the MAF Device Characterization module different transient simulations to set the feeding voltage, taking into account that the model must be fast enough to perform the required operation.

The previous figure shows simulation results. As can be seen, with 1.75V we can completely alter the state variable (bounded between “1” and “0”), and therefore, reach with this writing voltage either maximum/minimum memristance values.

Performing a Monte Carlo analysis with the MAF Device Characterization module we study how the variation of the feeding voltage and other parameters affects the maximum storage levels (Delta w) and the writing operation length (Delta T). The following figure shows an example of the evolution of the state variable w along the time. In the detailed view both Delta T and Delta w are presented. Evaluating those values we are able to refine the parameters of the memristor model and estimate the variability of the device.

Focusing on the pulse length of the writing operation, we carry out another Monte Carlo simulation using the MAF Level Characterization module. The histogram shows the pulse lengths occurrences required to perform the multi-level storage over 250 process scenarios. Based on this information, a designer is able to determine the operation security margins.

After all the memristor variables have been settled, as well as the operation voltage and timing are chosen, using the Subcircuit Editor module we automatically generate the corresponding SPICE subcircuit and proceed to include it in the global netlist.

At this stage, we can verify in SPICE that the non-desired effects of a spurious alteration of previously stored data in adjacent cells do not appear. The last figure displays the writing operation accomplished in both the target cell and an adjacent cell. As shown, the previous value stored in the adjacent cell is almost unaltered —notice the change in the left y axis— thus the impact is negligible.