There are major hurdles to overcome when bringing a new processor architecture to market. Today’s fast-paced development practices demand that processor offerings be stable with the promise of a long market lifetime. Further, they must come to market with substantial support in the form of development tools, software libraries, operating systems, emulators, debuggers, and more. The emerging RISC-V instruction set architecture has faced and is overcoming those hurdles and is poised to rapidly gain broad acceptance across the design industry.

There are several reasons the RISC-V ISA has been garnering a lot of interest. For one, the ISA is open source, meaning that anyone can design a processor to implement the ISA without paying a licensing fee. This opens the ISA to a huge, worldwide design community that can review, correct, and enhance the architecture over time. Yet because only the ISA is open source, developers are free to safeguard their hardware design’s intellectual property and keep it proprietary for commercialization.

Editor's Note: This is part of an Aspencore Special Project — a collection of interrelated articles — that explores hardware, software, and business issues surrounding RISC-V technology. RISC-V is an open instruction set architecture that supports customization on top of a standard core so that developers can have develop a support ecosystem easily extended to accommodate user-specific extensions.

A second reason RISC-V has caught the industry’s interest is that the ISA has been designed to be both stable for long-term viability, yet customizable to adapt to a wide range of applications. The ISA’s core specifications, on track for final ratification by the 200+ member RISC-V Foundation in the next few months, are frozen so that software developed for compliant processors today will still run on comparable processors developed years from now. The ISA is defined for 32-, 64-, and 128-bit implementations with code for the smaller bit widths executable on larger-base implementations.

Supplementing the ISA’s base specifications are standard extensions, many also frozen and on track for ratification this year. Developers can implement these standard extensions or not, as their application demands, without adversely affecting either the software created to work with a base implementation, or the tools used to develop the software. Further, RISC-V developers can add customized extensions to further optimize their design and see little to no adverse impact to base software or tools.

This chimera of standards-based customizability has attracted considerable industry interest while the ISA’s open-source nature has fostered a groundswell of support engineering. Basic ports of Linux, GNU-based development tools, and several core designs are already available from the open source community. In addition, companies such SiFive, NXP, Kendryte, and GreenWaves Technologies have created commercially-available RISC-V chips. Other companies, like Nvidia and Western Digital, have begun to embrace RISC-V in developing processors for their internal use, replacing proprietary designs. Commercial software development is also underway, with Adacore working to bring the Ada and Sparc programming languages to RISC-V for safety and security-critical applications.

Support for RISC-V is worldwide. In China, for instance, RISC-V momentum is growing and in India, startup InCore is working on RISC-V processors and AI accelerators. Further, according to reports from EE Times India, RISC-V is being adopted as the national ISA for India to help free the country’s design industry from dependence on the Intel x86 and ARM ISAs. Visitors to Europe’s Embedded World show can expect to see considerable RISC-V activity on display, as well.

The significance of RISC-V and breadth of activity it is stimulating is more than a single article can cover, which is why Aspencore has launched a Special Project on RISC-V. The articles in the project, listed below, provide a deeper look into many aspects of this technology, from the status of tools and software to an examination of its hardware design flexibility. In addition, the Project looks at the industry impact of RISC-V from several viewpoints, including its potential impact of companies like ARM and the impact of its open-source aspect on purchasing and supply.

RISC-V is a bold experiment in changing the nature of processor design and is on the cusp of major adoption by the industry. Whether it lives up to its promise or stalls in the market is impossible to predict for now. But either way, it bears watching. The articles linked to below can help readers get started.

For more in-depth insight into technical and business aspects of RISC-V, check out all the stories inside this RISC-V Special Project.

Creating a custom processor with RISC-V

The RISC-V instruction set architecture is an open framework that allows design of a customized processor that can leverage tools and software libraries created for the standard versions.

Introducing RISC-V and RISC-V tools

It seems like everyone is talking about RISC-V processors these days, but what exactly is RISC-V and what tools are available to designers?

RISC-V Climbs Software Mountain

The open-source architecture faces a long road through software standards from its beachhead as an SoC controller to use as a host processor.

Can Arm Survive the RISC-V challenge?

Arm offers limited flexibility compared to RISC-V or MIPS. No one wants to spend months negotiating license terms under today's cost and time-to-market pressures.

SiFive Sees Big Year for RISC-V

Startup expects many design wins, new players.

Open Source Hardware Benefits Procurement Practices

The advent of processor options based the RISC-V Instruction Set Architecture (ISA) may delight electronics engineers and designers, but open-source hardware presents a number of opportunities for enhanced supply chain and procurement efforts as well.

Can MIPS Leapfrog RISC-V?

MIPS will become a bona fide open-source ISA. But given that MIPS will offer “commercial-ready” instruction sets with “industrial-strength” architecture, hardware developers MIPS would attract are bigger and more mature companies, including current Arm licensees, according to Wave.