Intel’s Skylake X processors are slower than the Broadwell-E predecessors in some games. In an official statement, the chipmaker justified the performance by the brand-new mesh architecture for intra-chip communication. You shouldn’t expect an improvement via game patches for example.

In recent years, with each new process generation, Intel has seen an increase in performance per clock. This, however, doesn’t hold true in case of their latest high-end desktop Skylake X where the performance per clock, or the so called IPC (Instructions per clock), actually decreases.

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In tests conducted by GameStar.de, the deca-core i9-7900X falls short in game benchmarks compared to the Core i7-6900K and even outperformed by the Core i7-5960X from the Haswell-E series. The two older processors feature only eight cores and lower clocks.

As a response, Intel has offered an explanation on the subject. Chipzilla assumes that the Skylake X’s mesh structure for connecting the CPU cores to other components such as the memory controller, the cache, and the I/O components, degrades the performance in some applications.

So far, Intel has utilized a ring-bus architecture for process design. However, with the new HEDT products released this year, it moved to a new on-chip mesh architecture that the firm promises will offer higher bandwidth and lower latency.

For most applications, Skylake X is superior to the Broadwell-E processors, according to Intel. This is also indicated by benchmarks with 7-Zip, Cinebench and Handbrake. But, the development of a new architecture requires some compromises to achieve the overall improvement in performance.

While these compromises have a slightly negative impact on a handful of applications, the Skylake X processors deliver an excellent performance per core and significant performance gains across a variety of applications, thanks to the new architecture.

Furthermore, Intel Skylake X relies on a new ‘rebalanced‘ cache design. The L3 cache is reduced from 2.5MB to ‘up to’ 1.375MB per core, and it works “non-inclusive” instead of inclusive cache per core.

To ‘rebalance’ the reduction in LLC capacity, the L2 cache increases from 256KB to 1MB per core for Skylake-X. To what extent this new cache design affects the game performance is unclear.