[ANNOUNCE] xf86-video-intel 2.21.13

Release 2.21.13 (2013-07-27) ============================ A minor release to repair the build for non-Linux systems, and to undo a few more regressions. * Avoid potential memory corruption with allocations of very small depth 1 bitmaps. * Fix source clipping whilst computing copy extents and exposures. [Regression from 2.21.12] https://bugs.freedesktop.org/show_bug.cgi?id=66970 * Use /proc/cpuinfo if cpuid4 is not available (old hardware or old gcc), and repair the build on systems without cpuid. [Regression from 2.21.12] * Fix performance regression on Ironlake from inadvertently flushing after every operation. [Regression from 2.21.11] https://bugs.freedesktop.org/show_bug.cgi?id=67157 * Fix conflict handling when probing initial KMS configuration for ZaphodHeads. [Regression from 2.21.11] https://bugs.freedesktop.org/show_bug.cgi?id=67176 * Stop being overly restrictive and rejecting stale DRI2 buffers. (DRI2 is inherently racy in that the client may have completed and submitted rendering to buffers that are now invalid on the server. This race is magnified by bugs within the Xserver where it forgets to notify the DRI2 clients of certain invalidation events.) https://bugs.freedesktop.org/show_bug.cgi?id=67210 * Handle a failure to use a GTT mmap for a pixmap upload and try an alternative method before giving up. Complete list of changes since 2.21.12 -------------------------------------- Chris Wilson (54): sna/gen4: Allow rendering to Y-tiled surfaces sna: Change message context to PROBED for initial configuration sna: Create a pixmap in ordinary system memory for depth=1 uploads sna: Make the assumption bpp>=8 explicit inside the bo size calculation sna: Note that borderClip region may be more than a singular box sna: Include linear GTT maps when deciding whether a bo is mappable sna: Set a minimum size for tiled IO sna: Fall back to /proc/cpuinfo parsing if cpuid cache size probe fails sna: Fix typo in computing box intersection sna: Ensure that buffer_size is a power-of-two for use in ALIGN sna: Guard cpuid for use only with gcc-4.4 and later sna: Wrap cpuid.h sna/dri: Expose the refcnts in DBG before we hit the assertions sna/dri: Rearrange some more DBG to come before its assertion sna/dri: Reject invalid DRI2Drawables if STRICT_BLIT is defined sna/dri: Return early is the DRI2CopyRegion is not attached to the GPU sna: Also do exposure checking after source clipping in sna_do_copy sna: Only IGNORE_CPU for blt composite operations if the size is known sna: Tidy a few DBG regarding cached uploads sna: Discard overwritten operations before doing a BLT composite sna: Treat a source with a CPU bo as being attached. sna: Allow operation inplace when wedged sna: DBG controls to turn off unwinding partial bo sna: Remove the duplicated pimxap migration for the composite fb path sna: Add a fast path for the most common fallback for CPU-CPU blits sna: Return true from get_drawable_deltas() if the pixmap is offset sna: Check for bpp>=8 before attempting to use memcpy_blt fastpath sna: Perform an explicit check against the region extents sna/dri: Fix the strict blitting check not to assume the dst is the front buffer sna: Tidy fast source clip processing for sna_do_copy sna: Fix application of composite offsets along PutImage fallback path sna: Inform the upper layers that we turn the CRTC on after a modeset sna: Correct typo in checking src extents before performing memcpy sna: Relax assertion that CPU syncs are performed on reffed objects sna: Release cloned pixmap when updating tearfree scanout sna: Remember to apply drawable offsets for composite memcpy sna: Unwind BLT setup if we don't emit any ops sna: Allow linear inplace uploads along the tiled X PutImage blt paths sna: Missing git add to fix typo in assert() from last commit sna/gen5: Rework the flush after blend state changes sna: Bail if we fail to find the attached CRTC during probing configure: Use --enable-dri to control both DRI/DRI2 enabling sna: Fix DBG compilation configure: Fix enabling of DRI2 configure: Supply a default value for dridriverdir sna/gen5: The cached value of the pipelined pointers key requires 32-bits sna/dri: Cleanup validation of blit extents sna: Remove bogus comment concerning sna_enter_vt sna/dri: Restore the comparison of bottom-right extents to the pixmap origin sna/dri: Discard the strict checking for stale bo before performing a blit sna: Try the indirect upload if we elect to use a mmap and it fails test/dri2: We do not require the GLX includes sna/dri: correct DBG typo 2.21.13 release git tag: 2.21.13 http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.21.13.tar.bz2 MD5: 018154293ea25b69568ff0340a89ae7c xf86-video-intel-2.21.13.tar.bz2 SHA1: 0bae9d893f3b2b382514d53e84d00a29f27b93fc xf86-video-intel-2.21.13.tar.bz2 SHA256: 76e17cebf79d3c3c98af246fcfb55018aa12e2d56fe5f3b6d54b93e90837efa8 xf86-video-intel-2.21.13.tar.bz2 http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.21.13.tar.gz MD5: 84b443c136a49df32cf35b9485f3a8c1 xf86-video-intel-2.21.13.tar.gz SHA1: 2921f3395a8b2b2ed9b48a52ccd25f1231a84964 xf86-video-intel-2.21.13.tar.gz SHA256: b0c03cd588281bb5619ecc6e1626b32b4c4051f476965872439087da19083e2e xf86-video-intel-2.21.13.tar.gz -- Chris Wilson, Intel Open Source Technology Centre -------------- next part -------------- A non-text attachment was scrubbed... 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