AMD today laid out its plans for the next couple of years at its Financial Analyst Day. The plans are a mix of familiar and logical extensions of the company's current products, but contained some more surprising elements: specifically, AMD opened the door to future processors that include ARM CPUs.

The underlying themes to AMD's plans are faster iteration—a GPU-like 18-24 months between CPU designs, compared to the current 3 or more years—achieved by moving away from custom designs and depending more heavily on synthesized chip layouts, and lower power usage. This in turn will give AMD more flexibility to integrate CPUs and GPUs—and potentially other co-processors too—into what the company calls APUs (accelerated processing units).

Client processors

On the client side, this year AMD will release three APU lines: Trinity, aimed at the performance mobile and mainstream desktop segment, the low power desktop and mobile Brazos 2.0, and the ultra low power tablet-oriented Hondo. Trinity's CPU portion will be based on Piledriver, the successor to AMD's Bulldozer architecture. Each Trinity will pair one or two Piledriver modules (offering two or four threads) with an AMD 7000-series second generation Direct3D 11 GPU (though this may be marketing-ese, and it could be a 6000-series part branded as 7000-series).

The 9-18 W Brazos 2.0 will use AMD's low-power Bobcat core, pairing two of those with a 6000-series Direct3D GPU (this too might be marketing magic; current Brazos uses a 6000-branded 5000-series GPU, and the same may be true of Brazos 2.0 and Hondo). Hondo will have one or two Bobcat cores and a similar GPU, with a power draw of just 4.5 W.

AMD's desktop processors will also include a line of regular CPUs: the second generation FX processors, codenamed Vishera, with two to four Piledriver modules (4-8 threads).

In 2013, the company will make some bigger changes. On the mobile side, Trinity will be replaced by Kaveri, Brazos 2.0 by Kabini, and Hondo by Tamesh. Kaveri will continue to be Bulldozer-derived, using the third-generation Steamroller cores, along with AMD's "Graphics Core Next" (GCN) GPU. Kabini and Tamesh will similarly continue to be Bobcat-derived, using the revised "Jaguar" desgin. Kabini and Tamesh will also use the GCN GPU. Both will include integrated I/O functionality, including SATA and USB, making them single-chip solutions.

Kaveri and Kabini will also be used on the desktop. However, the company announced no plans to replace the Piledriver-powered Vishera with an equivalent Steamroller model. Vishera will continue to be sold into 2013.

Kaveri and Kabini will also be the first processors to support what AMD is calling Heterogeneous Systems Architecture (HSA). AMD's goal with HSA is to make mixed workloads that use both the CPU and the GPU easier. The 2013 HSA processors will give the GPU and CPU a unified, coherent address space, with the GPU able to use the same demand-paged virtual memory that the CPU uses. This means that data will no longer have to be moved from CPU to GPU to allow the GPU to work on it, and that both processors will be able to operate on the same data simultaneously, making mixed CPU/GPU computation seamless.

Server processors

The company's server roadmap is simpler. This year, 2- and 4-socket machines will continue to use Interlagos: 2-8 Bulldozer modules (4-16 threads), four HyperTransport links, four channels of DDR3 memory. 1- and 2-socket machines will use Valencia: 3 or 4 Bulldozer modules (6 or 8 threads), two HyperTransport links, two channels of DDR3 memory. High-density 1-socket machines will use Zurich: 2 or 4 Bulldozer modules (4 or 8 threads), one HyperTransport link, two channels of DDR3 memory.

Interlagos, Valencia, and Zurich will be replaced with, respectively, Abu Dhabi, Seoul, and Delhi. Module/thread counts will stay the same, as will the numbers of memory channels and HyperTransport links. The new processors will, however, use the Piledriver architecture. AMD says that Piledriver will improve performance in the same power envelope by about 10-15 percent.

Older server roadmaps from AMD included plans for a new socket for even larger server CPUs, a 10-thread part called Sepang and a 20-thread part Terramar. These have been cancelled in favor of the current plan. The decision to keep the module/thread counts the same and instead improve per-thread performance is a welcome one: in many workloads, Bulldozer's increased thread count was not enough to offset its weaker per-thread performance relative to AMD's previous generation processors. Piledriver should go some way toward redressing those weaknesses.

A mixed ISA future?

With APUs, more easily iterated synthesized designs, and HSA, AMD is taking some big steps toward producing flexible, heterogeneous processors: processors that pack together many different cores, each with their own strengths and weaknesses. AMD wants to extend the APU concept with other processor units, both AMD-originated and third party, to offer customers tailored solutions suitable for different applications. For example, motion video codec accelerators (such as those found in Intel's Medfield system-on-chip) would be attractive in tablets and, if AMD can get power usage down enough, even smartphones (though this is not a market the company is targeting at present).

One particularly intriguing third-party unit would be an ARM processor. AMD mentioned ARM several times during its presentations, and a number of its slides stated that the company wanted to produce SoCs that are "ambidextrous... across ISAs," stating also that the company was "flexible around ISA."

AMD spoke of these mixed-ISA processors in the context of servers and datacenters, so the immediate utility of an ARM processor is not clear. However, ARM Ltd wants to move ARM into the server space, having recently extended the ISA to support 64-bit systems. If ARM were to become a significant force in this market, the ability to natively run both ARM and x86 workloads on a single chip might become attractive. AMD could potentially even scrap the x86 core entirely, pairing ARM CPUs with its own high-performance GPUs.