heh DDR2-400 (PC2-3200) existed too in the very early DDR2 PCIe gen1 days. To put that in context that's a base clock of 100. It was horrible. But that's The Joke - all of the DDR generations suck at launch and only really take off once they can clear above where the prior gen couldn't handle (or at least not easily). DDR5's age will come when 32gig sticks running at say 6400 are the "just the normal base stick" much how right now DDR4 16gig sticks running at 3600 are quickly becoming the "base normal" DDR3 it seemed to be around 1600 with 8gig sticks DDR2 was 4gig sticks at 800 DDR1 was 1gig sticks at 200 (400) SDR i can't remember. 256mb at 133? EDO was expensive until toward the end. SIMMs not DIMMs ;p I'm probably off on many of those, it's been a few years ago!

Well i think in this one we might have to wait and see a little bit. In the past, the main trick was to increase the transfert rate while going back to an internal lower clock speed for the memory. DDR5 might bring some improvement that might lead to better performance.



- Switch from 1 channel per stick (64 bit + 8 bit ECC) to 2x(32 bit + 8 bit ECC). With this change, they also upgrade the burst lenght from 8 to 16 (to make sure a core can fill a line of cache with 1 burst). This is significant in our modern multicore/multithread environment as the number of channel per core have just lowered over time. The memory timming is only one part of the equation. The memory controller currently have to work with a lot of thread trying to get data from memory and they will probably just end up queued. Having the possibility to double the memory request a cpu can do at the same time will probably results in a speed increase in heavy multithreaded workload. That might not reflect on Single threaded latency test.



I am not sure how this will improve gaming performance as to benefits from this, you have to hope that each thread access data that is on a different channels, witch might not be always the case.



- Internal change to memory banks and bank groups (higher number of bank group per dimm with the same number of bank in it)

- Same Bank Refresh instead whole dimm refresh meaning that globally each memory DIMM will have an higher availability and this will reduce also the global latency. The memory can't be accessed for read or write while it's being refreshed.



So DDR5 do not only mean that they are going to double the memory transfert speed while cutting in half again the memory clock speed like they did with every version.(and this is why you get higher lattency every times) but it actually try to change the way the memory work to make it more efficient.



So with this, i am not sure how a DDR4 3200 kit will work against a DDR5 3200 kit. There might be scenario where the DDR5 outperform the DDR4 just by the way it's being designed. But that do not means anything until we really know what would be the commonly available spec.



The last thing that will help, but might take more time to benefits from it is DDR5 will allow larger DIMM size meaning we will be able to get much more memory per system.



So for me, it's really wait and see.