One of the statements you read a lot when you’re learning about digital logic is that NAND gates possess functional completeness, which means that they can be combined to implement any Boolean function.

Kevtris decided to take this idea to it’s logical* conclusion:

What is a NANDputer? it’s a computer made out of nothing but NAND gates of course! I dunno why, but I thought it’d be fun to make this. I first had to work out how various parts of a CPU would be made out of NANDs, did a bunch of tests and went to town.

The design took about 2 months to come up with and make. At the bottom of the post is a few statistics on gate usage and count of each type (2 input, 3 input, 4 input, etc). As I suspected, the quantity vs. gate input count follows a pretty steep curve, with most gates being 2 inputs, and the fewest being 13 input gates.

Everything on the design is made out of NAND gates, even the 7 segment decoding. The last PCB though has a few non-NAND gate chips like an NES PPU and a serial chip and stuff, but it’s just a peripheral board and is not part of the NANDputer proper. (Eventually I want to make a NAND UART and replace that peripheral board).

The basic architecture of the computer is actually fairly conventional. There’s an accumulator, instruction skipping (like on PIC) for decision making, a full ALU (and, add, or, xor, subtract, add with carry, subtract with borrow, set all bits, clear all bits, shifting), 8 bit registers, separate RAM/ROM areas (harvard arch), and bit set/clearing. There’s a 3 level stack, and even an interrupt!

While the CPU architecture is fairly conventional, the way it is implemented isn’t. I went with a bit-serial setup on here to save gates. The ALU for example is only 1 bit, with a “latching” carry so operations are performed a bit at a time on the 8 bit registers/memory. The program counter is also bit-serial, and on the first youtube video you can see the carry propagating during the incrementing of it.