AMD’s Ryzen CPUs are based on the chiplet or MCM design. Multiple CPU dies connected together via a high-speed interconnect on the substrate to form the final processor. This is efficient, reduces costs, improves yields and significantly reduces wastage. It has allowed AMD to build 64-core CPUs thanks to the linear scaling and production costs. However, the newly launched Ryzen 4000 APUs for notebooks aren’t based on the chiplet model and like competing Intel CPUs feature a monolithic design.

Like Intel Ryzen 4000 APUs have a Monolithic Design

When asked about this, AMD’s Scott Stankard explained that while the chiplet design was good for consumer and server CPUs, in notebook processors where power efficiency and form factor are the defining factors, it’s not quite as feasible.

We decided that the benefits of chiplet architecture were small in notebook processors that require the highest power consumption efficiency and size efficiency. Scott Stankard, Senior Product Manager, Client Business Unit, AMD

While Stankard is right, I believe the reason for a monolithic design is to maximize performance and reduce die size. Thanks to TSMC’s 7nm node, AMD Ryzen 3000 CPUs are significantly more power-efficient than Intel’s Coffee Lake lineup. However, using a multi-chip module architecture increases the die size and induces a latency penalty as well.

Unlike the desktop CPUs, Intel’s notebook lineup includes the notably faster Ice Lake CPUs and soon the Tiger Lake chips based on the Sunny Cove and Willow Cove, cores, respectively. These have a significantly improved IPC and single-core performance than the older 14nm Skylake core. That could also have been one of the factors behind a monolithic design.

Like the server market, Intel has almost complete dominance in the notebook market. If it were up to me, gaining a foothold in this segment would be one of my priorities, as it generates more revenue than the mainstream desktop and DIY markets.

Why Vega and not Navi?

The Ryzen 4000 “Renoir” APU lineup also featured an iGPU based on the Vega architecture, rather than the newer, more efficient Navi. Furthermore, the number of Compute Units was reduced across the board. AMD’s response to this was rather straight-forward.

Apparently AMD was “able to achieve the design goal of graphics performance with a small number of CUs.” The performance per CU has been increased by almost 60%. This comes via increases in core clocks (1400MHz to 1750MHz), process optimizations (12nm to 7nm) and other design and logic improvements. Therefore, although the CU count has reduced, AMD was able to offer up to 30% improved graphics performance.

As far as the inclusion of the Navi GPU in the Ryzen 4000 APUs is concerned, Stankard claimed that the development just wasn’t in time for integrating it. The next-gen lineup will most likely see the Zen 3 cores and Navi GPU together in an APU. For then, Vega will have to suffice.

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