The memory system is a fundamental performance and energy bottleneck

in almost all computing systems. Recent system design, application,

and technology trends that require more capacity, bandwidth,

efficiency, and predictability out of the memory system make it an

even more important system bottleneck. At the same time, DRAM

technology is experiencing difficult {\em technology scaling}

challenges that make the maintenance and enhancement of its capacity,

energy-efficiency, and reliability significantly more costly with

conventional techniques.

In this article, after describing the demands and challenges faced by

the memory system, we examine some promising research and design

directions to overcome challenges posed by memory

scaling. Specifically, we describe three major {\em new} research

challenges and solution directions: 1) enabling new DRAM

architectures, functions, interfaces, and better integration of the

DRAM and the rest of the system (an approach we call {\em system-DRAM co-design}), 2) designing a memory system that employs emerging

non-volatile memory technologies and takes advantage of multiple

different technologies (i.e., {\em hybrid memory systems}), 3)

providing predictable performance and QoS to applications sharing the

memory system (i.e., {\em QoS-aware memory systems}). We also briefly

describe our ongoing related work in combating scaling challenges of

NAND flash memory.