AMD gave a series of talks this week at an annual chip conference that together provide the first glimpse into its product roadmap since its analyst day at the beginning of the year. The company did not announce any new products--the Hot Chips symposium is for chip designers, not end-users--but it did provide new details on upcoming processors for everything from low-power mobile devices to high-performance desktops.

AMD’s low-power processors, the E-Series and C-Series for budget laptops and desktops and the Z-Series for tablets, are based on the “Cat” family of cores. The current chips uses one to two Bobcat cores and are manufactured by a foundry, TSMC, on a 40nm process. The next-generation will be based on a core code-named Jaguar, and at the conference AMD talked for the first time about Jaguar’s design.

The most obvious change in Jaguar is the shift to a compute unit with up to four cores with 2MB of shared L2 cache; Bobcat has up to two cores with 512KB of cache per core. It also has a more powerful floating point unit with a 128-bit data path compared with Bobcat’s 64-bit FPU. The core itself has a number of enhancements to increase performance. Jaguar also has several new features including support for the latest instructions (including SSE4.1 and SSE4.2, AES and AVX), the ability to address up to 40 bits of physical memory, improved virtualization support, and better power management. In all, AMD claims that the Jaguar core increases the number of instructions per clock by at least 15 percent and boosts core frequency by more than 10 percent over Bobcat.

The Jaguar core will be used in the Kabini APUs (Accelerated Processing Units), which will have two or four cores and a Radeon graphics, for basic laptops and desktops, as well as the Temash APU, a dual-core plus GPU for tablets. Both of these will be manufactured on a more advanced 28nm process and will ship sometime next year. Bobcat was AMD’s first CPU core that was designed to be relatively easy to move from one foundry to another, but Jaguar is even more portable. That helps keep the prices down and ensure that AMD can get a steady supply from its manufacturing partners.

The next rung on AMD’s ladder is the Trinity APU for mainstream laptops and desktops. These A-Series APUs are already shipping but the rollout seems slow and AMD continues to sell many of the older generation Llano APUs as well. While Llano is based on a Stars core, a design that dates back several years, Trinity uses a new Piledriver core. A Piledriver module has two of these CPU cores that share 2MB of L2 cache, a floating point unit and other components. Trinity has up to two of these modules (a quad-core), second-generation Radeon graphics, improved hardware accelerators for HD video playback and encoding, and support for up to three simultaneous displays.

AMD claims a 50 percent increasing the base frequency over a Llano APU that uses the same power, and an improved Turbo Core allows it to reach higher speeds in short bursts. Reviews have generally shown that Trinity is an improvement over Llano, but still falls short of Intel’s Core processors on CPU performance. In addition the A-Series APUs, the Piledriver core will be used in a new FX Series quad- and eight-core CPUs, code-named Vishera, for performance desktops with discrete graphics. These are scheduled to ship later this year. Both Trinity and Vishera are manufactured by Globalfoundries on a 32nm process. Piledriver will also be used next year’s server processors, also on a 32nm process.

The bigger news at Hot Chips, though, was a peek at the Steamroller, which will replace Piledriver. During a keynote address, AMD Chief Technology Officer Mark Papermaster highlighted some of the key changes to make the chips faster (better scheduling and faster single-core execution) and more efficient (eliminating an MMX unit in the FPU that was not heavily utilized and adding dynamic resizing of cache memory based on workloads).

Steamroller will first appear in the 28nm Kaveri dual- and quad-core APUs for mainstream laptops and desktops in 2013. Kaveri will also introduce AMD’s Heterogeneous Systems Architecture, or HSA, for CPU+GPU computing. Papermaster pitched HSA as one of the key technologies to enable what he called the surround computing era.

“It's not a pure speeds and feeds race,” he said. “It hasn’t been for the last several years. It is really about how you bring the solutions together.”